diff options
author | Neil Armstrong <narmstrong@baylibre.com> | 2016-08-22 08:49:37 -0400 |
---|---|---|
committer | Michael Turquette <mturquette@baylibre.com> | 2016-09-02 19:33:30 -0400 |
commit | 19a2a85d7157373b3540e9a0baff97d7cdca0dd5 (patch) | |
tree | 5a08a5aef20c3b0d55dd51106da522bb264412a2 | |
parent | e31a1900c1ff73d669408fc3243afb5c55863139 (diff) |
clk: meson-gxbb: Export PWM related clocks for DT
Add the PWM related clocks in order to be referenced as PWM source
clocks.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1471870177-10609-1-git-send-email-narmstrong@baylibre.com
-rw-r--r-- | drivers/clk/meson/gxbb.h | 6 | ||||
-rw-r--r-- | include/dt-bindings/clock/gxbb-clkc.h | 3 |
2 files changed, 6 insertions, 3 deletions
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 217df516de44..ae461b16af75 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h | |||
@@ -170,11 +170,11 @@ | |||
170 | */ | 170 | */ |
171 | #define CLKID_SYS_PLL 0 | 171 | #define CLKID_SYS_PLL 0 |
172 | /* CLKID_CPUCLK */ | 172 | /* CLKID_CPUCLK */ |
173 | #define CLKID_HDMI_PLL 2 | 173 | /* CLKID_HDMI_PLL */ |
174 | #define CLKID_FIXED_PLL 3 | 174 | #define CLKID_FIXED_PLL 3 |
175 | /* CLKID_FCLK_DIV2 */ | 175 | /* CLKID_FCLK_DIV2 */ |
176 | #define CLKID_FCLK_DIV3 5 | 176 | /* CLKID_FCLK_DIV3 */ |
177 | #define CLKID_FCLK_DIV4 6 | 177 | /* CLKID_FCLK_DIV4 */ |
178 | #define CLKID_FCLK_DIV5 7 | 178 | #define CLKID_FCLK_DIV5 7 |
179 | #define CLKID_FCLK_DIV7 8 | 179 | #define CLKID_FCLK_DIV7 8 |
180 | #define CLKID_GP0_PLL 9 | 180 | #define CLKID_GP0_PLL 9 |
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 7d418643cdcc..ce4ad637083d 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h | |||
@@ -6,7 +6,10 @@ | |||
6 | #define __GXBB_CLKC_H | 6 | #define __GXBB_CLKC_H |
7 | 7 | ||
8 | #define CLKID_CPUCLK 1 | 8 | #define CLKID_CPUCLK 1 |
9 | #define CLKID_HDMI_PLL 2 | ||
9 | #define CLKID_FCLK_DIV2 4 | 10 | #define CLKID_FCLK_DIV2 4 |
11 | #define CLKID_FCLK_DIV3 5 | ||
12 | #define CLKID_FCLK_DIV4 6 | ||
10 | #define CLKID_CLK81 12 | 13 | #define CLKID_CLK81 12 |
11 | #define CLKID_ETH 36 | 14 | #define CLKID_ETH 36 |
12 | #define CLKID_SD_EMMC_A 94 | 15 | #define CLKID_SD_EMMC_A 94 |