arm64: dts: qcom: Fix broken interrupt trigger settings

When a device uses the GIC as its interrupt controller and generates
SPIs, only the values 1 (edge rising) and 4 (level high) are legal.

Anything else is just plain wrong (can't be programmed into the HW),
and leads to aborted driver probes (USB doesn't work with 4.8-rc1
on a Dragonboard 410C).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

2 files changed, 6 insertions, 6 deletions

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 64f85f82602c..d07b2dd61bc6 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -494,7 +494,7 @@
                         compatible = "qcom,ci-hdrc";
                         reg = <0x78d9000 0x400>;
                         dr_mode = "peripheral";
-                        interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
+                        interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
                         usb-phy = <&usb_otg>;
                         status = "disabled";
                 };
@@ -502,7 +502,7 @@
                 usb_host: ehci@78d9000 {
                         compatible = "qcom,ehci-host";
                         reg = <0x78d9000 0x400>;
-                        interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
+                        interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
                         usb-phy = <&usb_otg>;
                         status = "disabled";
                 };
@@ -510,8 +510,8 @@
                 usb_otg: phy@78d9000 {
                         compatible = "qcom,usb-otg-snps";
                         reg = <0x78d9000 0x400>;
-                        interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
-                                     <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
+                        interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 
                         qcom,vdd-levels = <500000 1000000 1320000>;
                         qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
@@ -605,7 +605,7 @@
                               <0x200a000 0x002100>;
                         reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
                         interrupt-names = "periph_irq";
-                        interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
+                        interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
                         qcom,ee = <0>;
                         qcom,channel = <0>;
                         #address-cells = <2>;
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 55ec3e8326b7..69ed6e18b875 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -339,7 +339,7 @@
                               <0x400a000 0x002100>;
                         reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
                         interrupt-names = "periph_irq";
-                        interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
+                        interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
                         qcom,ee = <0>;
                         qcom,channel = <0>;
                         #address-cells = <2>;