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authorBjorn Andersson <bjorn.andersson@linaro.org>2016-07-15 20:42:14 -0400
committerAndy Gross <andy.gross@linaro.org>2016-08-23 23:57:35 -0400
commite95c08f45a8ecf9fa2e106f7e8243b7c850bde7f (patch)
tree87aa2023827f910b89214ab59c2bfda8b7bcbd28
parentfb3013d3fc984464c34c33aeffe8c0c75bc90723 (diff)
arm64: dts: qcom: msm8916: Add tcsr syscon
The TCSR memory segment includes various functionality, among other things the halt-registers for the Hexagon. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 1e67acc19a9d..64f85f82602c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -234,6 +234,11 @@
234 reg = <0x1905000 0x20000>; 234 reg = <0x1905000 0x20000>;
235 }; 235 };
236 236
237 tcsr: syscon@1937000 {
238 compatible = "qcom,tcsr-msm8916", "syscon";
239 reg = <0x1937000 0x30000>;
240 };
241
237 tcsr_mutex: hwlock { 242 tcsr_mutex: hwlock {
238 compatible = "qcom,tcsr-mutex"; 243 compatible = "qcom,tcsr-mutex";
239 syscon = <&tcsr_mutex_regs 0 0x1000>; 244 syscon = <&tcsr_mutex_regs 0 0x1000>;