diff options
author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-05-01 14:05:23 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2017-05-01 15:03:12 -0400 |
commit | 0ad5daf6ba80af4a8d72b4284079357c4e3b9e4a (patch) | |
tree | 1e13d246bebc3e436d7c02440463144913b12b5f | |
parent | f1394b78a602bae124a9b8473465ba48f4a5d5b2 (diff) |
net: dsa: mv88e6xxx: add VTU Load/Purge operation
Add a new vtu_loadpurge operation to the chip info structure to differ
the various implementations of the VTU accesses.
Now that the STU handling is abstracted behind VTU operations, kill the
obsolete MV88E6XXX_FLAG_STU flag.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.c | 80 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/global1.h | 4 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/global1_vtu.c | 66 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 10 |
4 files changed, 103 insertions, 57 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 1e14edebc0c7..51c8b2ff9760 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c | |||
@@ -1255,6 +1255,15 @@ static int mv88e6xxx_vtu_getnext(struct mv88e6xxx_chip *chip, | |||
1255 | return chip->info->ops->vtu_getnext(chip, entry); | 1255 | return chip->info->ops->vtu_getnext(chip, entry); |
1256 | } | 1256 | } |
1257 | 1257 | ||
1258 | static int mv88e6xxx_vtu_loadpurge(struct mv88e6xxx_chip *chip, | ||
1259 | struct mv88e6xxx_vtu_entry *entry) | ||
1260 | { | ||
1261 | if (!chip->info->ops->vtu_loadpurge) | ||
1262 | return -EOPNOTSUPP; | ||
1263 | |||
1264 | return chip->info->ops->vtu_loadpurge(chip, entry); | ||
1265 | } | ||
1266 | |||
1258 | static int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port, | 1267 | static int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port, |
1259 | struct switchdev_obj_port_vlan *vlan, | 1268 | struct switchdev_obj_port_vlan *vlan, |
1260 | int (*cb)(struct switchdev_obj *obj)) | 1269 | int (*cb)(struct switchdev_obj *obj)) |
@@ -1308,53 +1317,6 @@ unlock: | |||
1308 | return err; | 1317 | return err; |
1309 | } | 1318 | } |
1310 | 1319 | ||
1311 | static int _mv88e6xxx_vtu_loadpurge(struct mv88e6xxx_chip *chip, | ||
1312 | struct mv88e6xxx_vtu_entry *entry) | ||
1313 | { | ||
1314 | u16 op = GLOBAL_VTU_OP_VTU_LOAD_PURGE; | ||
1315 | int err; | ||
1316 | |||
1317 | err = mv88e6xxx_g1_vtu_op_wait(chip); | ||
1318 | if (err) | ||
1319 | return err; | ||
1320 | |||
1321 | err = mv88e6xxx_g1_vtu_vid_write(chip, entry); | ||
1322 | if (err) | ||
1323 | return err; | ||
1324 | |||
1325 | if (!entry->valid) | ||
1326 | goto loadpurge; | ||
1327 | |||
1328 | /* Write port member tags */ | ||
1329 | err = mv88e6185_g1_vtu_data_write(chip, entry); | ||
1330 | if (err) | ||
1331 | return err; | ||
1332 | |||
1333 | if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_STU)) { | ||
1334 | err = mv88e6xxx_g1_vtu_sid_write(chip, entry); | ||
1335 | if (err) | ||
1336 | return err; | ||
1337 | |||
1338 | err = mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_STU_LOAD_PURGE); | ||
1339 | if (err) | ||
1340 | return err; | ||
1341 | } | ||
1342 | |||
1343 | if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G1_VTU_FID)) { | ||
1344 | err = mv88e6xxx_g1_vtu_fid_write(chip, entry); | ||
1345 | if (err) | ||
1346 | return err; | ||
1347 | } else if (mv88e6xxx_num_databases(chip) == 256) { | ||
1348 | /* VTU DBNum[7:4] are located in VTU Operation 11:8, and | ||
1349 | * VTU DBNum[3:0] are located in VTU Operation 3:0 | ||
1350 | */ | ||
1351 | op |= (entry->fid & 0xf0) << 8; | ||
1352 | op |= entry->fid & 0xf; | ||
1353 | } | ||
1354 | loadpurge: | ||
1355 | return mv88e6xxx_g1_vtu_op(chip, op); | ||
1356 | } | ||
1357 | |||
1358 | static int mv88e6xxx_atu_new(struct mv88e6xxx_chip *chip, u16 *fid) | 1320 | static int mv88e6xxx_atu_new(struct mv88e6xxx_chip *chip, u16 *fid) |
1359 | { | 1321 | { |
1360 | DECLARE_BITMAP(fid_bitmap, MV88E6XXX_N_FID); | 1322 | DECLARE_BITMAP(fid_bitmap, MV88E6XXX_N_FID); |
@@ -1565,7 +1527,7 @@ static int _mv88e6xxx_port_vlan_add(struct mv88e6xxx_chip *chip, int port, | |||
1565 | GLOBAL_VTU_DATA_MEMBER_TAG_UNTAGGED : | 1527 | GLOBAL_VTU_DATA_MEMBER_TAG_UNTAGGED : |
1566 | GLOBAL_VTU_DATA_MEMBER_TAG_TAGGED; | 1528 | GLOBAL_VTU_DATA_MEMBER_TAG_TAGGED; |
1567 | 1529 | ||
1568 | return _mv88e6xxx_vtu_loadpurge(chip, &vlan); | 1530 | return mv88e6xxx_vtu_loadpurge(chip, &vlan); |
1569 | } | 1531 | } |
1570 | 1532 | ||
1571 | static void mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, | 1533 | static void mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, |
@@ -1624,7 +1586,7 @@ static int _mv88e6xxx_port_vlan_del(struct mv88e6xxx_chip *chip, | |||
1624 | } | 1586 | } |
1625 | } | 1587 | } |
1626 | 1588 | ||
1627 | err = _mv88e6xxx_vtu_loadpurge(chip, &vlan); | 1589 | err = mv88e6xxx_vtu_loadpurge(chip, &vlan); |
1628 | if (err) | 1590 | if (err) |
1629 | return err; | 1591 | return err; |
1630 | 1592 | ||
@@ -2669,6 +2631,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = { | |||
2669 | .ppu_disable = mv88e6185_g1_ppu_disable, | 2631 | .ppu_disable = mv88e6185_g1_ppu_disable, |
2670 | .reset = mv88e6185_g1_reset, | 2632 | .reset = mv88e6185_g1_reset, |
2671 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2633 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2634 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2672 | }; | 2635 | }; |
2673 | 2636 | ||
2674 | static const struct mv88e6xxx_ops mv88e6095_ops = { | 2637 | static const struct mv88e6xxx_ops mv88e6095_ops = { |
@@ -2691,6 +2654,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = { | |||
2691 | .ppu_disable = mv88e6185_g1_ppu_disable, | 2654 | .ppu_disable = mv88e6185_g1_ppu_disable, |
2692 | .reset = mv88e6185_g1_reset, | 2655 | .reset = mv88e6185_g1_reset, |
2693 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | 2656 | .vtu_getnext = mv88e6185_g1_vtu_getnext, |
2657 | .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge, | ||
2694 | }; | 2658 | }; |
2695 | 2659 | ||
2696 | static const struct mv88e6xxx_ops mv88e6097_ops = { | 2660 | static const struct mv88e6xxx_ops mv88e6097_ops = { |
@@ -2720,6 +2684,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = { | |||
2720 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2684 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2721 | .reset = mv88e6352_g1_reset, | 2685 | .reset = mv88e6352_g1_reset, |
2722 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2686 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2687 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2723 | }; | 2688 | }; |
2724 | 2689 | ||
2725 | static const struct mv88e6xxx_ops mv88e6123_ops = { | 2690 | static const struct mv88e6xxx_ops mv88e6123_ops = { |
@@ -2744,6 +2709,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = { | |||
2744 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2709 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2745 | .reset = mv88e6352_g1_reset, | 2710 | .reset = mv88e6352_g1_reset, |
2746 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2711 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2712 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2747 | }; | 2713 | }; |
2748 | 2714 | ||
2749 | static const struct mv88e6xxx_ops mv88e6131_ops = { | 2715 | static const struct mv88e6xxx_ops mv88e6131_ops = { |
@@ -2774,6 +2740,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = { | |||
2774 | .ppu_disable = mv88e6185_g1_ppu_disable, | 2740 | .ppu_disable = mv88e6185_g1_ppu_disable, |
2775 | .reset = mv88e6185_g1_reset, | 2741 | .reset = mv88e6185_g1_reset, |
2776 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | 2742 | .vtu_getnext = mv88e6185_g1_vtu_getnext, |
2743 | .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge, | ||
2777 | }; | 2744 | }; |
2778 | 2745 | ||
2779 | static const struct mv88e6xxx_ops mv88e6141_ops = { | 2746 | static const struct mv88e6xxx_ops mv88e6141_ops = { |
@@ -2806,6 +2773,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops = { | |||
2806 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, | 2773 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, |
2807 | .reset = mv88e6352_g1_reset, | 2774 | .reset = mv88e6352_g1_reset, |
2808 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2775 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2776 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2809 | }; | 2777 | }; |
2810 | 2778 | ||
2811 | static const struct mv88e6xxx_ops mv88e6161_ops = { | 2779 | static const struct mv88e6xxx_ops mv88e6161_ops = { |
@@ -2835,6 +2803,7 @@ static const struct mv88e6xxx_ops mv88e6161_ops = { | |||
2835 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2803 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2836 | .reset = mv88e6352_g1_reset, | 2804 | .reset = mv88e6352_g1_reset, |
2837 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2805 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2806 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2838 | }; | 2807 | }; |
2839 | 2808 | ||
2840 | static const struct mv88e6xxx_ops mv88e6165_ops = { | 2809 | static const struct mv88e6xxx_ops mv88e6165_ops = { |
@@ -2857,6 +2826,7 @@ static const struct mv88e6xxx_ops mv88e6165_ops = { | |||
2857 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2826 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2858 | .reset = mv88e6352_g1_reset, | 2827 | .reset = mv88e6352_g1_reset, |
2859 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2828 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2829 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2860 | }; | 2830 | }; |
2861 | 2831 | ||
2862 | static const struct mv88e6xxx_ops mv88e6171_ops = { | 2832 | static const struct mv88e6xxx_ops mv88e6171_ops = { |
@@ -2887,6 +2857,7 @@ static const struct mv88e6xxx_ops mv88e6171_ops = { | |||
2887 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2857 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2888 | .reset = mv88e6352_g1_reset, | 2858 | .reset = mv88e6352_g1_reset, |
2889 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2859 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2860 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2890 | }; | 2861 | }; |
2891 | 2862 | ||
2892 | static const struct mv88e6xxx_ops mv88e6172_ops = { | 2863 | static const struct mv88e6xxx_ops mv88e6172_ops = { |
@@ -2919,6 +2890,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = { | |||
2919 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2890 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2920 | .reset = mv88e6352_g1_reset, | 2891 | .reset = mv88e6352_g1_reset, |
2921 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2892 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2893 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2922 | }; | 2894 | }; |
2923 | 2895 | ||
2924 | static const struct mv88e6xxx_ops mv88e6175_ops = { | 2896 | static const struct mv88e6xxx_ops mv88e6175_ops = { |
@@ -2949,6 +2921,7 @@ static const struct mv88e6xxx_ops mv88e6175_ops = { | |||
2949 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2921 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2950 | .reset = mv88e6352_g1_reset, | 2922 | .reset = mv88e6352_g1_reset, |
2951 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2923 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2924 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2952 | }; | 2925 | }; |
2953 | 2926 | ||
2954 | static const struct mv88e6xxx_ops mv88e6176_ops = { | 2927 | static const struct mv88e6xxx_ops mv88e6176_ops = { |
@@ -2981,6 +2954,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = { | |||
2981 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2954 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2982 | .reset = mv88e6352_g1_reset, | 2955 | .reset = mv88e6352_g1_reset, |
2983 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 2956 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
2957 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
2984 | }; | 2958 | }; |
2985 | 2959 | ||
2986 | static const struct mv88e6xxx_ops mv88e6185_ops = { | 2960 | static const struct mv88e6xxx_ops mv88e6185_ops = { |
@@ -3007,6 +2981,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = { | |||
3007 | .ppu_disable = mv88e6185_g1_ppu_disable, | 2981 | .ppu_disable = mv88e6185_g1_ppu_disable, |
3008 | .reset = mv88e6185_g1_reset, | 2982 | .reset = mv88e6185_g1_reset, |
3009 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | 2983 | .vtu_getnext = mv88e6185_g1_vtu_getnext, |
2984 | .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge, | ||
3010 | }; | 2985 | }; |
3011 | 2986 | ||
3012 | static const struct mv88e6xxx_ops mv88e6190_ops = { | 2987 | static const struct mv88e6xxx_ops mv88e6190_ops = { |
@@ -3129,6 +3104,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = { | |||
3129 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3104 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3130 | .reset = mv88e6352_g1_reset, | 3105 | .reset = mv88e6352_g1_reset, |
3131 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 3106 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
3107 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
3132 | }; | 3108 | }; |
3133 | 3109 | ||
3134 | static const struct mv88e6xxx_ops mv88e6290_ops = { | 3110 | static const struct mv88e6xxx_ops mv88e6290_ops = { |
@@ -3190,6 +3166,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = { | |||
3190 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3166 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3191 | .reset = mv88e6352_g1_reset, | 3167 | .reset = mv88e6352_g1_reset, |
3192 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | 3168 | .vtu_getnext = mv88e6185_g1_vtu_getnext, |
3169 | .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge, | ||
3193 | }; | 3170 | }; |
3194 | 3171 | ||
3195 | static const struct mv88e6xxx_ops mv88e6321_ops = { | 3172 | static const struct mv88e6xxx_ops mv88e6321_ops = { |
@@ -3219,6 +3196,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = { | |||
3219 | .g1_set_egress_port = mv88e6095_g1_set_egress_port, | 3196 | .g1_set_egress_port = mv88e6095_g1_set_egress_port, |
3220 | .reset = mv88e6352_g1_reset, | 3197 | .reset = mv88e6352_g1_reset, |
3221 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | 3198 | .vtu_getnext = mv88e6185_g1_vtu_getnext, |
3199 | .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge, | ||
3222 | }; | 3200 | }; |
3223 | 3201 | ||
3224 | static const struct mv88e6xxx_ops mv88e6341_ops = { | 3202 | static const struct mv88e6xxx_ops mv88e6341_ops = { |
@@ -3251,6 +3229,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops = { | |||
3251 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, | 3229 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, |
3252 | .reset = mv88e6352_g1_reset, | 3230 | .reset = mv88e6352_g1_reset, |
3253 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 3231 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
3232 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
3254 | }; | 3233 | }; |
3255 | 3234 | ||
3256 | static const struct mv88e6xxx_ops mv88e6350_ops = { | 3235 | static const struct mv88e6xxx_ops mv88e6350_ops = { |
@@ -3281,6 +3260,7 @@ static const struct mv88e6xxx_ops mv88e6350_ops = { | |||
3281 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3260 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3282 | .reset = mv88e6352_g1_reset, | 3261 | .reset = mv88e6352_g1_reset, |
3283 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 3262 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
3263 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
3284 | }; | 3264 | }; |
3285 | 3265 | ||
3286 | static const struct mv88e6xxx_ops mv88e6351_ops = { | 3266 | static const struct mv88e6xxx_ops mv88e6351_ops = { |
@@ -3311,6 +3291,7 @@ static const struct mv88e6xxx_ops mv88e6351_ops = { | |||
3311 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3291 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3312 | .reset = mv88e6352_g1_reset, | 3292 | .reset = mv88e6352_g1_reset, |
3313 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 3293 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
3294 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
3314 | }; | 3295 | }; |
3315 | 3296 | ||
3316 | static const struct mv88e6xxx_ops mv88e6352_ops = { | 3297 | static const struct mv88e6xxx_ops mv88e6352_ops = { |
@@ -3343,6 +3324,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { | |||
3343 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3324 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3344 | .reset = mv88e6352_g1_reset, | 3325 | .reset = mv88e6352_g1_reset, |
3345 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | 3326 | .vtu_getnext = mv88e6352_g1_vtu_getnext, |
3327 | .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, | ||
3346 | }; | 3328 | }; |
3347 | 3329 | ||
3348 | static const struct mv88e6xxx_ops mv88e6390_ops = { | 3330 | static const struct mv88e6xxx_ops mv88e6390_ops = { |
diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h index 780ee8241dbf..60dd7079c756 100644 --- a/drivers/net/dsa/mv88e6xxx/global1.h +++ b/drivers/net/dsa/mv88e6xxx/global1.h | |||
@@ -76,8 +76,12 @@ int mv88e6xxx_g1_vtu_stu_get(struct mv88e6xxx_chip *chip, | |||
76 | struct mv88e6xxx_vtu_entry *vtu); | 76 | struct mv88e6xxx_vtu_entry *vtu); |
77 | int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | 77 | int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip, |
78 | struct mv88e6xxx_vtu_entry *entry); | 78 | struct mv88e6xxx_vtu_entry *entry); |
79 | int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip, | ||
80 | struct mv88e6xxx_vtu_entry *entry); | ||
79 | int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | 81 | int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip, |
80 | struct mv88e6xxx_vtu_entry *entry); | 82 | struct mv88e6xxx_vtu_entry *entry); |
83 | int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip, | ||
84 | struct mv88e6xxx_vtu_entry *entry); | ||
81 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip); | 85 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip); |
82 | 86 | ||
83 | #endif /* _MV88E6XXX_GLOBAL1_H */ | 87 | #endif /* _MV88E6XXX_GLOBAL1_H */ |
diff --git a/drivers/net/dsa/mv88e6xxx/global1_vtu.c b/drivers/net/dsa/mv88e6xxx/global1_vtu.c index 8b07b6b0fc7d..73e08c5c3948 100644 --- a/drivers/net/dsa/mv88e6xxx/global1_vtu.c +++ b/drivers/net/dsa/mv88e6xxx/global1_vtu.c | |||
@@ -302,6 +302,72 @@ int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | |||
302 | return 0; | 302 | return 0; |
303 | } | 303 | } |
304 | 304 | ||
305 | int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip, | ||
306 | struct mv88e6xxx_vtu_entry *entry) | ||
307 | { | ||
308 | u16 op = GLOBAL_VTU_OP_VTU_LOAD_PURGE; | ||
309 | int err; | ||
310 | |||
311 | err = mv88e6xxx_g1_vtu_op_wait(chip); | ||
312 | if (err) | ||
313 | return err; | ||
314 | |||
315 | err = mv88e6xxx_g1_vtu_vid_write(chip, entry); | ||
316 | if (err) | ||
317 | return err; | ||
318 | |||
319 | if (entry->valid) { | ||
320 | err = mv88e6185_g1_vtu_data_write(chip, entry); | ||
321 | if (err) | ||
322 | return err; | ||
323 | |||
324 | /* VTU DBNum[3:0] are located in VTU Operation 3:0 | ||
325 | * VTU DBNum[7:4] are located in VTU Operation 11:8 | ||
326 | */ | ||
327 | op |= entry->fid & 0x000f; | ||
328 | op |= (entry->fid & 0x00f0) << 8; | ||
329 | } | ||
330 | |||
331 | return mv88e6xxx_g1_vtu_op(chip, op); | ||
332 | } | ||
333 | |||
334 | int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip, | ||
335 | struct mv88e6xxx_vtu_entry *entry) | ||
336 | { | ||
337 | int err; | ||
338 | |||
339 | err = mv88e6xxx_g1_vtu_op_wait(chip); | ||
340 | if (err) | ||
341 | return err; | ||
342 | |||
343 | err = mv88e6xxx_g1_vtu_vid_write(chip, entry); | ||
344 | if (err) | ||
345 | return err; | ||
346 | |||
347 | if (entry->valid) { | ||
348 | /* Write MemberTag and PortState data */ | ||
349 | err = mv88e6185_g1_vtu_data_write(chip, entry); | ||
350 | if (err) | ||
351 | return err; | ||
352 | |||
353 | err = mv88e6xxx_g1_vtu_sid_write(chip, entry); | ||
354 | if (err) | ||
355 | return err; | ||
356 | |||
357 | /* Load STU entry */ | ||
358 | err = mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_STU_LOAD_PURGE); | ||
359 | if (err) | ||
360 | return err; | ||
361 | |||
362 | err = mv88e6xxx_g1_vtu_fid_write(chip, entry); | ||
363 | if (err) | ||
364 | return err; | ||
365 | } | ||
366 | |||
367 | /* Load/Purge VTU entry */ | ||
368 | return mv88e6xxx_g1_vtu_op(chip, GLOBAL_VTU_OP_VTU_LOAD_PURGE); | ||
369 | } | ||
370 | |||
305 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip) | 371 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip) |
306 | { | 372 | { |
307 | int err; | 373 | int err; |
diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h index b356f2875643..a0d57b10acfe 100644 --- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h +++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | |||
@@ -566,8 +566,6 @@ enum mv88e6xxx_cap { | |||
566 | #define MV88E6XXX_FLAG_G2_IRL_DATA BIT_ULL(MV88E6XXX_CAP_G2_IRL_DATA) | 566 | #define MV88E6XXX_FLAG_G2_IRL_DATA BIT_ULL(MV88E6XXX_CAP_G2_IRL_DATA) |
567 | #define MV88E6XXX_FLAG_G2_POT BIT_ULL(MV88E6XXX_CAP_G2_POT) | 567 | #define MV88E6XXX_FLAG_G2_POT BIT_ULL(MV88E6XXX_CAP_G2_POT) |
568 | 568 | ||
569 | #define MV88E6XXX_FLAG_STU BIT_ULL(MV88E6XXX_CAP_STU) | ||
570 | |||
571 | /* Ingress Rate Limit unit */ | 569 | /* Ingress Rate Limit unit */ |
572 | #define MV88E6XXX_FLAGS_IRL \ | 570 | #define MV88E6XXX_FLAGS_IRL \ |
573 | (MV88E6XXX_FLAG_G2_IRL_CMD | \ | 571 | (MV88E6XXX_FLAG_G2_IRL_CMD | \ |
@@ -595,7 +593,6 @@ enum mv88e6xxx_cap { | |||
595 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ | 593 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ |
596 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ | 594 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ |
597 | MV88E6XXX_FLAG_G2_POT | \ | 595 | MV88E6XXX_FLAG_G2_POT | \ |
598 | MV88E6XXX_FLAG_STU | \ | ||
599 | MV88E6XXX_FLAGS_IRL | \ | 596 | MV88E6XXX_FLAGS_IRL | \ |
600 | MV88E6XXX_FLAGS_MULTI_CHIP) | 597 | MV88E6XXX_FLAGS_MULTI_CHIP) |
601 | 598 | ||
@@ -606,7 +603,6 @@ enum mv88e6xxx_cap { | |||
606 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ | 603 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ |
607 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ | 604 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ |
608 | MV88E6XXX_FLAG_G2_POT | \ | 605 | MV88E6XXX_FLAG_G2_POT | \ |
609 | MV88E6XXX_FLAG_STU | \ | ||
610 | MV88E6XXX_FLAGS_IRL | \ | 606 | MV88E6XXX_FLAGS_IRL | \ |
611 | MV88E6XXX_FLAGS_MULTI_CHIP) | 607 | MV88E6XXX_FLAGS_MULTI_CHIP) |
612 | 608 | ||
@@ -631,7 +627,6 @@ enum mv88e6xxx_cap { | |||
631 | MV88E6XXX_FLAG_GLOBAL2 | \ | 627 | MV88E6XXX_FLAG_GLOBAL2 | \ |
632 | MV88E6XXX_FLAG_G2_INT | \ | 628 | MV88E6XXX_FLAG_G2_INT | \ |
633 | MV88E6XXX_FLAG_G2_POT | \ | 629 | MV88E6XXX_FLAG_G2_POT | \ |
634 | MV88E6XXX_FLAG_STU | \ | ||
635 | MV88E6XXX_FLAGS_IRL | \ | 630 | MV88E6XXX_FLAGS_IRL | \ |
636 | MV88E6XXX_FLAGS_MULTI_CHIP | \ | 631 | MV88E6XXX_FLAGS_MULTI_CHIP | \ |
637 | MV88E6XXX_FLAGS_SERDES) | 632 | MV88E6XXX_FLAGS_SERDES) |
@@ -643,7 +638,6 @@ enum mv88e6xxx_cap { | |||
643 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ | 638 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ |
644 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ | 639 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ |
645 | MV88E6XXX_FLAG_G2_POT | \ | 640 | MV88E6XXX_FLAG_G2_POT | \ |
646 | MV88E6XXX_FLAG_STU | \ | ||
647 | MV88E6XXX_FLAGS_IRL | \ | 641 | MV88E6XXX_FLAGS_IRL | \ |
648 | MV88E6XXX_FLAGS_MULTI_CHIP) | 642 | MV88E6XXX_FLAGS_MULTI_CHIP) |
649 | 643 | ||
@@ -655,7 +649,6 @@ enum mv88e6xxx_cap { | |||
655 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ | 649 | MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ |
656 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ | 650 | MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ |
657 | MV88E6XXX_FLAG_G2_POT | \ | 651 | MV88E6XXX_FLAG_G2_POT | \ |
658 | MV88E6XXX_FLAG_STU | \ | ||
659 | MV88E6XXX_FLAGS_IRL | \ | 652 | MV88E6XXX_FLAGS_IRL | \ |
660 | MV88E6XXX_FLAGS_MULTI_CHIP | \ | 653 | MV88E6XXX_FLAGS_MULTI_CHIP | \ |
661 | MV88E6XXX_FLAGS_SERDES) | 654 | MV88E6XXX_FLAGS_SERDES) |
@@ -664,7 +657,6 @@ enum mv88e6xxx_cap { | |||
664 | (MV88E6XXX_FLAG_EEE | \ | 657 | (MV88E6XXX_FLAG_EEE | \ |
665 | MV88E6XXX_FLAG_GLOBAL2 | \ | 658 | MV88E6XXX_FLAG_GLOBAL2 | \ |
666 | MV88E6XXX_FLAG_G2_INT | \ | 659 | MV88E6XXX_FLAG_G2_INT | \ |
667 | MV88E6XXX_FLAG_STU | \ | ||
668 | MV88E6XXX_FLAGS_IRL | \ | 660 | MV88E6XXX_FLAGS_IRL | \ |
669 | MV88E6XXX_FLAGS_MULTI_CHIP) | 661 | MV88E6XXX_FLAGS_MULTI_CHIP) |
670 | 662 | ||
@@ -894,6 +886,8 @@ struct mv88e6xxx_ops { | |||
894 | /* VLAN Translation Unit operations */ | 886 | /* VLAN Translation Unit operations */ |
895 | int (*vtu_getnext)(struct mv88e6xxx_chip *chip, | 887 | int (*vtu_getnext)(struct mv88e6xxx_chip *chip, |
896 | struct mv88e6xxx_vtu_entry *entry); | 888 | struct mv88e6xxx_vtu_entry *entry); |
889 | int (*vtu_loadpurge)(struct mv88e6xxx_chip *chip, | ||
890 | struct mv88e6xxx_vtu_entry *entry); | ||
897 | }; | 891 | }; |
898 | 892 | ||
899 | struct mv88e6xxx_irq_ops { | 893 | struct mv88e6xxx_irq_ops { |