diff options
author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-05-01 14:05:22 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2017-05-01 15:03:12 -0400 |
commit | f1394b78a602bae124a9b8473465ba48f4a5d5b2 (patch) | |
tree | 4b48b25d66ab975908dea9245b837938964b10c5 | |
parent | 021e64ff7676ad5183c1845d4b316df20175702a (diff) |
net: dsa: mv88e6xxx: add VTU GetNext operation
Add a new vtu_getnext operation to the chip info structure to differ the
various implementations of the VTU accesses.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.c | 82 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/global1.h | 4 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/global1_vtu.c | 57 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 4 |
4 files changed, 99 insertions, 48 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index fc30a3e3df47..1e14edebc0c7 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c | |||
@@ -1238,49 +1238,6 @@ static void mv88e6xxx_port_fast_age(struct dsa_switch *ds, int port) | |||
1238 | netdev_err(ds->ports[port].netdev, "failed to flush ATU\n"); | 1238 | netdev_err(ds->ports[port].netdev, "failed to flush ATU\n"); |
1239 | } | 1239 | } |
1240 | 1240 | ||
1241 | static int _mv88e6xxx_vtu_getnext(struct mv88e6xxx_chip *chip, | ||
1242 | struct mv88e6xxx_vtu_entry *entry) | ||
1243 | { | ||
1244 | struct mv88e6xxx_vtu_entry next = *entry; | ||
1245 | u16 val; | ||
1246 | int err; | ||
1247 | |||
1248 | err = mv88e6xxx_g1_vtu_getnext(chip, &next); | ||
1249 | if (err) | ||
1250 | return err; | ||
1251 | |||
1252 | if (next.valid) { | ||
1253 | if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G1_VTU_FID)) { | ||
1254 | err = mv88e6xxx_g1_vtu_fid_read(chip, &next); | ||
1255 | if (err) | ||
1256 | return err; | ||
1257 | } else if (mv88e6xxx_num_databases(chip) == 256) { | ||
1258 | /* VTU DBNum[7:4] are located in VTU Operation 11:8, and | ||
1259 | * VTU DBNum[3:0] are located in VTU Operation 3:0 | ||
1260 | */ | ||
1261 | err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_OP, &val); | ||
1262 | if (err) | ||
1263 | return err; | ||
1264 | |||
1265 | next.fid = (val & 0xf00) >> 4; | ||
1266 | next.fid |= val & 0xf; | ||
1267 | } | ||
1268 | |||
1269 | if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_STU)) { | ||
1270 | err = mv88e6xxx_g1_vtu_stu_get(chip, &next); | ||
1271 | if (err) | ||
1272 | return err; | ||
1273 | } | ||
1274 | |||
1275 | err = mv88e6185_g1_vtu_data_read(chip, &next); | ||
1276 | if (err) | ||
1277 | return err; | ||
1278 | } | ||
1279 | |||
1280 | *entry = next; | ||
1281 | return 0; | ||
1282 | } | ||
1283 | |||
1284 | static int mv88e6xxx_vtu_setup(struct mv88e6xxx_chip *chip) | 1241 | static int mv88e6xxx_vtu_setup(struct mv88e6xxx_chip *chip) |
1285 | { | 1242 | { |
1286 | if (!chip->info->max_vid) | 1243 | if (!chip->info->max_vid) |
@@ -1289,6 +1246,15 @@ static int mv88e6xxx_vtu_setup(struct mv88e6xxx_chip *chip) | |||
1289 | return mv88e6xxx_g1_vtu_flush(chip); | 1246 | return mv88e6xxx_g1_vtu_flush(chip); |
1290 | } | 1247 | } |
1291 | 1248 | ||
1249 | static int mv88e6xxx_vtu_getnext(struct mv88e6xxx_chip *chip, | ||
1250 | struct mv88e6xxx_vtu_entry *entry) | ||
1251 | { | ||
1252 | if (!chip->info->ops->vtu_getnext) | ||
1253 | return -EOPNOTSUPP; | ||
1254 | |||
1255 | return chip->info->ops->vtu_getnext(chip, entry); | ||
1256 | } | ||
1257 | |||
1292 | static int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port, | 1258 | static int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port, |
1293 | struct switchdev_obj_port_vlan *vlan, | 1259 | struct switchdev_obj_port_vlan *vlan, |
1294 | int (*cb)(struct switchdev_obj *obj)) | 1260 | int (*cb)(struct switchdev_obj *obj)) |
@@ -1310,7 +1276,7 @@ static int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port, | |||
1310 | goto unlock; | 1276 | goto unlock; |
1311 | 1277 | ||
1312 | do { | 1278 | do { |
1313 | err = _mv88e6xxx_vtu_getnext(chip, &next); | 1279 | err = mv88e6xxx_vtu_getnext(chip, &next); |
1314 | if (err) | 1280 | if (err) |
1315 | break; | 1281 | break; |
1316 | 1282 | ||
@@ -1410,7 +1376,7 @@ static int mv88e6xxx_atu_new(struct mv88e6xxx_chip *chip, u16 *fid) | |||
1410 | 1376 | ||
1411 | /* Set every FID bit used by the VLAN entries */ | 1377 | /* Set every FID bit used by the VLAN entries */ |
1412 | do { | 1378 | do { |
1413 | err = _mv88e6xxx_vtu_getnext(chip, &vlan); | 1379 | err = mv88e6xxx_vtu_getnext(chip, &vlan); |
1414 | if (err) | 1380 | if (err) |
1415 | return err; | 1381 | return err; |
1416 | 1382 | ||
@@ -1467,7 +1433,7 @@ static int _mv88e6xxx_vtu_get(struct mv88e6xxx_chip *chip, u16 vid, | |||
1467 | entry->vid = vid - 1; | 1433 | entry->vid = vid - 1; |
1468 | entry->valid = false; | 1434 | entry->valid = false; |
1469 | 1435 | ||
1470 | err = _mv88e6xxx_vtu_getnext(chip, entry); | 1436 | err = mv88e6xxx_vtu_getnext(chip, entry); |
1471 | if (err) | 1437 | if (err) |
1472 | return err; | 1438 | return err; |
1473 | 1439 | ||
@@ -1499,7 +1465,7 @@ static int mv88e6xxx_port_check_hw_vlan(struct dsa_switch *ds, int port, | |||
1499 | mutex_lock(&chip->reg_lock); | 1465 | mutex_lock(&chip->reg_lock); |
1500 | 1466 | ||
1501 | do { | 1467 | do { |
1502 | err = _mv88e6xxx_vtu_getnext(chip, &vlan); | 1468 | err = mv88e6xxx_vtu_getnext(chip, &vlan); |
1503 | if (err) | 1469 | if (err) |
1504 | goto unlock; | 1470 | goto unlock; |
1505 | 1471 | ||
@@ -1857,7 +1823,7 @@ static int mv88e6xxx_port_db_dump(struct mv88e6xxx_chip *chip, int port, | |||
1857 | 1823 | ||
1858 | /* Dump VLANs' Filtering Information Databases */ | 1824 | /* Dump VLANs' Filtering Information Databases */ |
1859 | do { | 1825 | do { |
1860 | err = _mv88e6xxx_vtu_getnext(chip, &vlan); | 1826 | err = mv88e6xxx_vtu_getnext(chip, &vlan); |
1861 | if (err) | 1827 | if (err) |
1862 | return err; | 1828 | return err; |
1863 | 1829 | ||
@@ -2702,6 +2668,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = { | |||
2702 | .ppu_enable = mv88e6185_g1_ppu_enable, | 2668 | .ppu_enable = mv88e6185_g1_ppu_enable, |
2703 | .ppu_disable = mv88e6185_g1_ppu_disable, | 2669 | .ppu_disable = mv88e6185_g1_ppu_disable, |
2704 | .reset = mv88e6185_g1_reset, | 2670 | .reset = mv88e6185_g1_reset, |
2671 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2705 | }; | 2672 | }; |
2706 | 2673 | ||
2707 | static const struct mv88e6xxx_ops mv88e6095_ops = { | 2674 | static const struct mv88e6xxx_ops mv88e6095_ops = { |
@@ -2723,6 +2690,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = { | |||
2723 | .ppu_enable = mv88e6185_g1_ppu_enable, | 2690 | .ppu_enable = mv88e6185_g1_ppu_enable, |
2724 | .ppu_disable = mv88e6185_g1_ppu_disable, | 2691 | .ppu_disable = mv88e6185_g1_ppu_disable, |
2725 | .reset = mv88e6185_g1_reset, | 2692 | .reset = mv88e6185_g1_reset, |
2693 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | ||
2726 | }; | 2694 | }; |
2727 | 2695 | ||
2728 | static const struct mv88e6xxx_ops mv88e6097_ops = { | 2696 | static const struct mv88e6xxx_ops mv88e6097_ops = { |
@@ -2751,6 +2719,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = { | |||
2751 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2719 | .watchdog_ops = &mv88e6097_watchdog_ops, |
2752 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2720 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2753 | .reset = mv88e6352_g1_reset, | 2721 | .reset = mv88e6352_g1_reset, |
2722 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2754 | }; | 2723 | }; |
2755 | 2724 | ||
2756 | static const struct mv88e6xxx_ops mv88e6123_ops = { | 2725 | static const struct mv88e6xxx_ops mv88e6123_ops = { |
@@ -2774,6 +2743,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = { | |||
2774 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2743 | .watchdog_ops = &mv88e6097_watchdog_ops, |
2775 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2744 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2776 | .reset = mv88e6352_g1_reset, | 2745 | .reset = mv88e6352_g1_reset, |
2746 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2777 | }; | 2747 | }; |
2778 | 2748 | ||
2779 | static const struct mv88e6xxx_ops mv88e6131_ops = { | 2749 | static const struct mv88e6xxx_ops mv88e6131_ops = { |
@@ -2803,6 +2773,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = { | |||
2803 | .ppu_enable = mv88e6185_g1_ppu_enable, | 2773 | .ppu_enable = mv88e6185_g1_ppu_enable, |
2804 | .ppu_disable = mv88e6185_g1_ppu_disable, | 2774 | .ppu_disable = mv88e6185_g1_ppu_disable, |
2805 | .reset = mv88e6185_g1_reset, | 2775 | .reset = mv88e6185_g1_reset, |
2776 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | ||
2806 | }; | 2777 | }; |
2807 | 2778 | ||
2808 | static const struct mv88e6xxx_ops mv88e6141_ops = { | 2779 | static const struct mv88e6xxx_ops mv88e6141_ops = { |
@@ -2834,6 +2805,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops = { | |||
2834 | .watchdog_ops = &mv88e6390_watchdog_ops, | 2805 | .watchdog_ops = &mv88e6390_watchdog_ops, |
2835 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, | 2806 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, |
2836 | .reset = mv88e6352_g1_reset, | 2807 | .reset = mv88e6352_g1_reset, |
2808 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2837 | }; | 2809 | }; |
2838 | 2810 | ||
2839 | static const struct mv88e6xxx_ops mv88e6161_ops = { | 2811 | static const struct mv88e6xxx_ops mv88e6161_ops = { |
@@ -2862,6 +2834,7 @@ static const struct mv88e6xxx_ops mv88e6161_ops = { | |||
2862 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2834 | .watchdog_ops = &mv88e6097_watchdog_ops, |
2863 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2835 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2864 | .reset = mv88e6352_g1_reset, | 2836 | .reset = mv88e6352_g1_reset, |
2837 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2865 | }; | 2838 | }; |
2866 | 2839 | ||
2867 | static const struct mv88e6xxx_ops mv88e6165_ops = { | 2840 | static const struct mv88e6xxx_ops mv88e6165_ops = { |
@@ -2883,6 +2856,7 @@ static const struct mv88e6xxx_ops mv88e6165_ops = { | |||
2883 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2856 | .watchdog_ops = &mv88e6097_watchdog_ops, |
2884 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2857 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2885 | .reset = mv88e6352_g1_reset, | 2858 | .reset = mv88e6352_g1_reset, |
2859 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2886 | }; | 2860 | }; |
2887 | 2861 | ||
2888 | static const struct mv88e6xxx_ops mv88e6171_ops = { | 2862 | static const struct mv88e6xxx_ops mv88e6171_ops = { |
@@ -2912,6 +2886,7 @@ static const struct mv88e6xxx_ops mv88e6171_ops = { | |||
2912 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2886 | .watchdog_ops = &mv88e6097_watchdog_ops, |
2913 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2887 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2914 | .reset = mv88e6352_g1_reset, | 2888 | .reset = mv88e6352_g1_reset, |
2889 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2915 | }; | 2890 | }; |
2916 | 2891 | ||
2917 | static const struct mv88e6xxx_ops mv88e6172_ops = { | 2892 | static const struct mv88e6xxx_ops mv88e6172_ops = { |
@@ -2943,6 +2918,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = { | |||
2943 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2918 | .watchdog_ops = &mv88e6097_watchdog_ops, |
2944 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2919 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2945 | .reset = mv88e6352_g1_reset, | 2920 | .reset = mv88e6352_g1_reset, |
2921 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2946 | }; | 2922 | }; |
2947 | 2923 | ||
2948 | static const struct mv88e6xxx_ops mv88e6175_ops = { | 2924 | static const struct mv88e6xxx_ops mv88e6175_ops = { |
@@ -2972,6 +2948,7 @@ static const struct mv88e6xxx_ops mv88e6175_ops = { | |||
2972 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2948 | .watchdog_ops = &mv88e6097_watchdog_ops, |
2973 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2949 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
2974 | .reset = mv88e6352_g1_reset, | 2950 | .reset = mv88e6352_g1_reset, |
2951 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
2975 | }; | 2952 | }; |
2976 | 2953 | ||
2977 | static const struct mv88e6xxx_ops mv88e6176_ops = { | 2954 | static const struct mv88e6xxx_ops mv88e6176_ops = { |
@@ -3003,6 +2980,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = { | |||
3003 | .watchdog_ops = &mv88e6097_watchdog_ops, | 2980 | .watchdog_ops = &mv88e6097_watchdog_ops, |
3004 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 2981 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3005 | .reset = mv88e6352_g1_reset, | 2982 | .reset = mv88e6352_g1_reset, |
2983 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
3006 | }; | 2984 | }; |
3007 | 2985 | ||
3008 | static const struct mv88e6xxx_ops mv88e6185_ops = { | 2986 | static const struct mv88e6xxx_ops mv88e6185_ops = { |
@@ -3028,6 +3006,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = { | |||
3028 | .ppu_enable = mv88e6185_g1_ppu_enable, | 3006 | .ppu_enable = mv88e6185_g1_ppu_enable, |
3029 | .ppu_disable = mv88e6185_g1_ppu_disable, | 3007 | .ppu_disable = mv88e6185_g1_ppu_disable, |
3030 | .reset = mv88e6185_g1_reset, | 3008 | .reset = mv88e6185_g1_reset, |
3009 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | ||
3031 | }; | 3010 | }; |
3032 | 3011 | ||
3033 | static const struct mv88e6xxx_ops mv88e6190_ops = { | 3012 | static const struct mv88e6xxx_ops mv88e6190_ops = { |
@@ -3149,6 +3128,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = { | |||
3149 | .watchdog_ops = &mv88e6097_watchdog_ops, | 3128 | .watchdog_ops = &mv88e6097_watchdog_ops, |
3150 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3129 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3151 | .reset = mv88e6352_g1_reset, | 3130 | .reset = mv88e6352_g1_reset, |
3131 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
3152 | }; | 3132 | }; |
3153 | 3133 | ||
3154 | static const struct mv88e6xxx_ops mv88e6290_ops = { | 3134 | static const struct mv88e6xxx_ops mv88e6290_ops = { |
@@ -3209,6 +3189,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = { | |||
3209 | .g1_set_egress_port = mv88e6095_g1_set_egress_port, | 3189 | .g1_set_egress_port = mv88e6095_g1_set_egress_port, |
3210 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3190 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3211 | .reset = mv88e6352_g1_reset, | 3191 | .reset = mv88e6352_g1_reset, |
3192 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | ||
3212 | }; | 3193 | }; |
3213 | 3194 | ||
3214 | static const struct mv88e6xxx_ops mv88e6321_ops = { | 3195 | static const struct mv88e6xxx_ops mv88e6321_ops = { |
@@ -3237,6 +3218,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = { | |||
3237 | .g1_set_cpu_port = mv88e6095_g1_set_cpu_port, | 3218 | .g1_set_cpu_port = mv88e6095_g1_set_cpu_port, |
3238 | .g1_set_egress_port = mv88e6095_g1_set_egress_port, | 3219 | .g1_set_egress_port = mv88e6095_g1_set_egress_port, |
3239 | .reset = mv88e6352_g1_reset, | 3220 | .reset = mv88e6352_g1_reset, |
3221 | .vtu_getnext = mv88e6185_g1_vtu_getnext, | ||
3240 | }; | 3222 | }; |
3241 | 3223 | ||
3242 | static const struct mv88e6xxx_ops mv88e6341_ops = { | 3224 | static const struct mv88e6xxx_ops mv88e6341_ops = { |
@@ -3268,6 +3250,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops = { | |||
3268 | .watchdog_ops = &mv88e6390_watchdog_ops, | 3250 | .watchdog_ops = &mv88e6390_watchdog_ops, |
3269 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, | 3251 | .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu, |
3270 | .reset = mv88e6352_g1_reset, | 3252 | .reset = mv88e6352_g1_reset, |
3253 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
3271 | }; | 3254 | }; |
3272 | 3255 | ||
3273 | static const struct mv88e6xxx_ops mv88e6350_ops = { | 3256 | static const struct mv88e6xxx_ops mv88e6350_ops = { |
@@ -3297,6 +3280,7 @@ static const struct mv88e6xxx_ops mv88e6350_ops = { | |||
3297 | .watchdog_ops = &mv88e6097_watchdog_ops, | 3280 | .watchdog_ops = &mv88e6097_watchdog_ops, |
3298 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3281 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3299 | .reset = mv88e6352_g1_reset, | 3282 | .reset = mv88e6352_g1_reset, |
3283 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
3300 | }; | 3284 | }; |
3301 | 3285 | ||
3302 | static const struct mv88e6xxx_ops mv88e6351_ops = { | 3286 | static const struct mv88e6xxx_ops mv88e6351_ops = { |
@@ -3326,6 +3310,7 @@ static const struct mv88e6xxx_ops mv88e6351_ops = { | |||
3326 | .watchdog_ops = &mv88e6097_watchdog_ops, | 3310 | .watchdog_ops = &mv88e6097_watchdog_ops, |
3327 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3311 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3328 | .reset = mv88e6352_g1_reset, | 3312 | .reset = mv88e6352_g1_reset, |
3313 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
3329 | }; | 3314 | }; |
3330 | 3315 | ||
3331 | static const struct mv88e6xxx_ops mv88e6352_ops = { | 3316 | static const struct mv88e6xxx_ops mv88e6352_ops = { |
@@ -3357,6 +3342,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { | |||
3357 | .watchdog_ops = &mv88e6097_watchdog_ops, | 3342 | .watchdog_ops = &mv88e6097_watchdog_ops, |
3358 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, | 3343 | .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu, |
3359 | .reset = mv88e6352_g1_reset, | 3344 | .reset = mv88e6352_g1_reset, |
3345 | .vtu_getnext = mv88e6352_g1_vtu_getnext, | ||
3360 | }; | 3346 | }; |
3361 | 3347 | ||
3362 | static const struct mv88e6xxx_ops mv88e6390_ops = { | 3348 | static const struct mv88e6xxx_ops mv88e6390_ops = { |
diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h index 76b49a3a4701..780ee8241dbf 100644 --- a/drivers/net/dsa/mv88e6xxx/global1.h +++ b/drivers/net/dsa/mv88e6xxx/global1.h | |||
@@ -74,6 +74,10 @@ int mv88e6xxx_g1_vtu_stu_getnext(struct mv88e6xxx_chip *chip, | |||
74 | struct mv88e6xxx_vtu_entry *vtu); | 74 | struct mv88e6xxx_vtu_entry *vtu); |
75 | int mv88e6xxx_g1_vtu_stu_get(struct mv88e6xxx_chip *chip, | 75 | int mv88e6xxx_g1_vtu_stu_get(struct mv88e6xxx_chip *chip, |
76 | struct mv88e6xxx_vtu_entry *vtu); | 76 | struct mv88e6xxx_vtu_entry *vtu); |
77 | int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | ||
78 | struct mv88e6xxx_vtu_entry *entry); | ||
79 | int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | ||
80 | struct mv88e6xxx_vtu_entry *entry); | ||
77 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip); | 81 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip); |
78 | 82 | ||
79 | #endif /* _MV88E6XXX_GLOBAL1_H */ | 83 | #endif /* _MV88E6XXX_GLOBAL1_H */ |
diff --git a/drivers/net/dsa/mv88e6xxx/global1_vtu.c b/drivers/net/dsa/mv88e6xxx/global1_vtu.c index 710f86fa3b4e..8b07b6b0fc7d 100644 --- a/drivers/net/dsa/mv88e6xxx/global1_vtu.c +++ b/drivers/net/dsa/mv88e6xxx/global1_vtu.c | |||
@@ -245,6 +245,63 @@ int mv88e6xxx_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | |||
245 | return mv88e6xxx_g1_vtu_vid_read(chip, entry); | 245 | return mv88e6xxx_g1_vtu_vid_read(chip, entry); |
246 | } | 246 | } |
247 | 247 | ||
248 | int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | ||
249 | struct mv88e6xxx_vtu_entry *entry) | ||
250 | { | ||
251 | u16 val; | ||
252 | int err; | ||
253 | |||
254 | err = mv88e6xxx_g1_vtu_getnext(chip, entry); | ||
255 | if (err) | ||
256 | return err; | ||
257 | |||
258 | if (entry->valid) { | ||
259 | err = mv88e6185_g1_vtu_data_read(chip, entry); | ||
260 | if (err) | ||
261 | return err; | ||
262 | |||
263 | /* VTU DBNum[3:0] are located in VTU Operation 3:0 | ||
264 | * VTU DBNum[7:4] are located in VTU Operation 11:8 | ||
265 | */ | ||
266 | err = mv88e6xxx_g1_read(chip, GLOBAL_VTU_OP, &val); | ||
267 | if (err) | ||
268 | return err; | ||
269 | |||
270 | entry->fid = val & 0x000f; | ||
271 | entry->fid |= (val & 0x0f00) >> 4; | ||
272 | } | ||
273 | |||
274 | return 0; | ||
275 | } | ||
276 | |||
277 | int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip, | ||
278 | struct mv88e6xxx_vtu_entry *entry) | ||
279 | { | ||
280 | int err; | ||
281 | |||
282 | /* Fetch VLAN MemberTag data from the VTU */ | ||
283 | err = mv88e6xxx_g1_vtu_getnext(chip, entry); | ||
284 | if (err) | ||
285 | return err; | ||
286 | |||
287 | if (entry->valid) { | ||
288 | /* Fetch (and mask) VLAN PortState data from the STU */ | ||
289 | err = mv88e6xxx_g1_vtu_stu_get(chip, entry); | ||
290 | if (err) | ||
291 | return err; | ||
292 | |||
293 | err = mv88e6185_g1_vtu_data_read(chip, entry); | ||
294 | if (err) | ||
295 | return err; | ||
296 | |||
297 | err = mv88e6xxx_g1_vtu_fid_read(chip, entry); | ||
298 | if (err) | ||
299 | return err; | ||
300 | } | ||
301 | |||
302 | return 0; | ||
303 | } | ||
304 | |||
248 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip) | 305 | int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip) |
249 | { | 306 | { |
250 | int err; | 307 | int err; |
diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h index 8638892a7e18..b356f2875643 100644 --- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h +++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | |||
@@ -890,6 +890,10 @@ struct mv88e6xxx_ops { | |||
890 | 890 | ||
891 | /* Can be either in g1 or g2, so don't use a prefix */ | 891 | /* Can be either in g1 or g2, so don't use a prefix */ |
892 | int (*mgmt_rsvd2cpu)(struct mv88e6xxx_chip *chip); | 892 | int (*mgmt_rsvd2cpu)(struct mv88e6xxx_chip *chip); |
893 | |||
894 | /* VLAN Translation Unit operations */ | ||
895 | int (*vtu_getnext)(struct mv88e6xxx_chip *chip, | ||
896 | struct mv88e6xxx_vtu_entry *entry); | ||
893 | }; | 897 | }; |
894 | 898 | ||
895 | struct mv88e6xxx_irq_ops { | 899 | struct mv88e6xxx_irq_ops { |