drm/i915: Move HAS_GUC definition to platform definition

Moving all GPU features to the platform definition allows for
        - standard place when adding new features from new platform
        - possible to see supported features when dumping struct
          definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

2 files changed, 7 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 755799e06a21..f39bede7664c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -666,6 +666,7 @@ struct intel_csr {
         func(has_logical_ring_contexts) sep \
         func(has_l3_dpf) sep \
         func(has_gmch_display) sep \
+        func(has_guc) sep \
         func(has_pipe_cxsr) sep \
         func(has_hotplug) sep \
         func(cursor_needs_physical) sep \
@@ -2807,7 +2808,7 @@ struct drm_i915_cmd_table {
  * command submission once loaded. But these are logically independent
  * properties, so we have separate macros to test them.
  */
-#define HAS_GUC(dev)            (IS_GEN9(dev))
+#define HAS_GUC(dev)            (INTEL_INFO(dev)->has_guc)
 #define HAS_GUC_UCODE(dev)      (HAS_GUC(dev))
 #define HAS_GUC_SCHED(dev)      (HAS_GUC(dev))
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 05603b151acd..d771870ddd2b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -327,6 +327,7 @@ static const struct intel_device_info intel_skylake_info = {
         .is_skylake = 1,
         .gen = 9,
         .has_csr = 1,
+        .has_guc = 1,
 };
 
 static const struct intel_device_info intel_skylake_gt3_info = {
@@ -334,6 +335,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
         .is_skylake = 1,
         .gen = 9,
         .has_csr = 1,
+        .has_guc = 1,
         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
@@ -355,6 +357,7 @@ static const struct intel_device_info intel_broxton_info = {
         .has_gmbus_irq = 1,
         .has_hw_contexts = 1,
         .has_logical_ring_contexts = 1,
+        .has_guc = 1,
         GEN_DEFAULT_PIPEOFFSETS,
         IVB_CURSOR_OFFSETS,
         BDW_COLORS,
@@ -365,6 +368,7 @@ static const struct intel_device_info intel_kabylake_info = {
         .is_kabylake = 1,
         .gen = 9,
         .has_csr = 1,
+        .has_guc = 1,
 };
 
 static const struct intel_device_info intel_kabylake_gt3_info = {
@@ -372,6 +376,7 @@ static const struct intel_device_info intel_kabylake_gt3_info = {
         .is_kabylake = 1,
         .gen = 9,
         .has_csr = 1,
+        .has_guc = 1,
         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };