aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk/samsung/clk-exynos-audss.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2016-07-30 14:20:02 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-07-30 14:20:02 -0400
commit1056c9bd2702ea1bb79abf9bd1e78c578589d247 (patch)
treefaada7d658151c059a845cdb9d9d521817d1e611 /drivers/clk/samsung/clk-exynos-audss.c
parent797cee982eef9195736afc5e7f3b8f613c41d19a (diff)
parentd22527fed2f094c2e4f9a66f35b68a090c3d906a (diff)
Merge tag 'clk-for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Michael Turquette: "The bulk of the changes are updates and fixes to existing clk provider drivers, along with a pretty standard number of new drivers. The core recieved a small number of updates as well. Core changes of note: - removed CLK_IS_ROOT flag New clk provider drivers: - Renesas r8a7796 clock pulse generator / module standby and software reset - Allwinner sun8i H3 clock controller unit - AmLogic meson8b clock controller (rewritten) - AmLogic gxbb clock controller - support for some new ICs was added by simple changes to static data tables for chips sharing the same family Driver updates of note: - the Allwinner sunxi clock driver infrastucture was rewritten to comform to the state of the art at drivers/clk/sunxi-ng. The old implementation is still supported for backwards compatibility with the DT ABI" * tag 'clk-for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (162 commits) clk: Makefile: re-sort and clean up Revert "clk: gxbb: expose CLKID_MMC_PCLK" clk: samsung: Allow modular build of the Audio Subsystem CLKCON driver clk: samsung: make clk-s5pv210-audss explicitly non-modular clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks clk: oxnas: Add hardware dependencies clk: imx7d: do not set parent of ethernet time/ref clocks ARM: dt: sun8i: switch the H3 to the new CCU driver clk: sunxi-ng: h3: Fix Kconfig symbol typo clk: sunxi-ng: h3: Fix audio clock divider offset clk: sunxi-ng: Add H3 clocks clk: sunxi-ng: Add N-K-M-P factor clock clk: sunxi-ng: Add N-K-M Factor clock clk: sunxi-ng: Add N-M-factor clock support clk: sunxi-ng: Add N-K-factor clock support clk: sunxi-ng: Add M-P factor clock support clk: sunxi-ng: Add divider clk: sunxi-ng: Add phase clock support clk: sunxi-ng: Add mux clock support clk: sunxi-ng: Add gate clock support ...
Diffstat (limited to 'drivers/clk/samsung/clk-exynos-audss.c')
-rw-r--r--drivers/clk/samsung/clk-exynos-audss.c12
1 files changed, 1 insertions, 11 deletions
diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c
index 4e9584d79089..bdf8b971f332 100644
--- a/drivers/clk/samsung/clk-exynos-audss.c
+++ b/drivers/clk/samsung/clk-exynos-audss.c
@@ -273,17 +273,7 @@ static struct platform_driver exynos_audss_clk_driver = {
273 .remove = exynos_audss_clk_remove, 273 .remove = exynos_audss_clk_remove,
274}; 274};
275 275
276static int __init exynos_audss_clk_init(void) 276module_platform_driver(exynos_audss_clk_driver);
277{
278 return platform_driver_register(&exynos_audss_clk_driver);
279}
280core_initcall(exynos_audss_clk_init);
281
282static void __exit exynos_audss_clk_exit(void)
283{
284 platform_driver_unregister(&exynos_audss_clk_driver);
285}
286module_exit(exynos_audss_clk_exit);
287 277
288MODULE_AUTHOR("Padmavathi Venna <padma.v@samsung.com>"); 278MODULE_AUTHOR("Padmavathi Venna <padma.v@samsung.com>");
289MODULE_DESCRIPTION("Exynos Audio Subsystem Clock Controller"); 279MODULE_DESCRIPTION("Exynos Audio Subsystem Clock Controller");