diff options
author | Uwe Kleine-König <uwe@kleine-koenig.org> | 2016-07-08 17:22:54 -0400 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2016-08-08 23:40:40 -0400 |
commit | c007b3a697ac4a9a11947bec63d2ae443a29cde1 (patch) | |
tree | 1ed60794f5e7834042f24288261762c3f3a82690 /arch/arm/boot | |
parent | 51a012b76267f2de8a0209ffdf91f67f3fb3ff42 (diff) |
ARM: dts: imx6qdl: don't configure reserved pad settings
Several dts files set a bit in the SPEED field for pads
RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there
doesn't have an effect and the bit reads as zero.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot')
28 files changed, 323 insertions, 323 deletions
diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts index 2becd7cd6544..75d73437adf7 100644 --- a/arch/arm/boot/dts/imx6dl-riotboard.dts +++ b/arch/arm/boot/dts/imx6dl-riotboard.dts | |||
@@ -376,18 +376,18 @@ | |||
376 | fsl,pins = < | 376 | fsl,pins = < |
377 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 377 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
378 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 378 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
379 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 379 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
380 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 380 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
381 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 381 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
382 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 382 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
383 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 383 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
384 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 384 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
385 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ | 385 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ |
386 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 /* AR8035 pin strapping: IO voltage: pull up */ | 386 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: IO voltage: pull up */ |
387 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 /* AR8035 pin strapping: PHYADDR#0: pull down */ | 387 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#0: pull down */ |
388 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 /* AR8035 pin strapping: PHYADDR#1: pull down */ | 388 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */ |
389 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 /* AR8035 pin strapping: MODE#1: pull up */ | 389 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#1: pull up */ |
390 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 /* AR8035 pin strapping: MODE#3: pull up */ | 390 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */ |
391 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ | 391 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ |
392 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 /* GPIO16 -> AR8035 25MHz */ | 392 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 /* GPIO16 -> AR8035 25MHz */ |
393 | MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ | 393 | MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ |
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index d8acf15611e4..4989d0bff10f 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts | |||
@@ -79,19 +79,19 @@ | |||
79 | fsl,pins = < | 79 | fsl,pins = < |
80 | MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 | 80 | MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 |
81 | MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 | 81 | MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 |
82 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 82 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
83 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 83 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
84 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 84 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
85 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 85 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
86 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 86 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
87 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 87 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
88 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 88 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
89 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 89 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
90 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 90 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
91 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 91 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
92 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 92 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
93 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 93 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
94 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 94 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
95 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 | 95 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
96 | >; | 96 | >; |
97 | }; | 97 | }; |
diff --git a/arch/arm/boot/dts/imx6q-ba16.dtsi b/arch/arm/boot/dts/imx6q-ba16.dtsi index f2adc60723da..308e11cea1db 100644 --- a/arch/arm/boot/dts/imx6q-ba16.dtsi +++ b/arch/arm/boot/dts/imx6q-ba16.dtsi | |||
@@ -448,19 +448,19 @@ | |||
448 | fsl,pins = < | 448 | fsl,pins = < |
449 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 | 449 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
450 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 | 450 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
451 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 | 451 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
452 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 | 452 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 |
453 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 | 453 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 |
454 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 | 454 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 |
455 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 | 455 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 |
456 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 | 456 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 |
457 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 | 457 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
458 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 458 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
459 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 459 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
460 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 460 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
461 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 461 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
462 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 462 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
463 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 463 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
464 | /* FEC Reset */ | 464 | /* FEC Reset */ |
465 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 | 465 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 |
466 | /* AR8033 Interrupt */ | 466 | /* AR8033 Interrupt */ |
diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts index b5de7e620905..59bc5a4dce17 100644 --- a/arch/arm/boot/dts/imx6q-cm-fx6.dts +++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts | |||
@@ -168,18 +168,18 @@ | |||
168 | 168 | ||
169 | pinctrl_enet: enetgrp { | 169 | pinctrl_enet: enetgrp { |
170 | fsl,pins = < | 170 | fsl,pins = < |
171 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 171 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
172 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 172 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
173 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 173 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
174 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 174 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
175 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 175 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
176 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 176 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
177 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 177 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
178 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 178 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
179 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 179 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
180 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 180 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
181 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 181 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
182 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 182 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
183 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 183 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
184 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 184 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
185 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 185 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts index 905907325f3b..908dab68bdca 100644 --- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | |||
@@ -324,18 +324,18 @@ | |||
324 | 324 | ||
325 | pinctrl_enet: enetgrp { | 325 | pinctrl_enet: enetgrp { |
326 | fsl,pins = < | 326 | fsl,pins = < |
327 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 327 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
328 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 328 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
329 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 329 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
330 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 330 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
331 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 331 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
332 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 332 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
333 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 333 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
334 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 334 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
335 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 335 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
336 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 336 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
337 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 337 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
338 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 338 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
339 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 339 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
340 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 340 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
341 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 341 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts index 4fa56019225e..9647c099acc6 100644 --- a/arch/arm/boot/dts/imx6q-evi.dts +++ b/arch/arm/boot/dts/imx6q-evi.dts | |||
@@ -303,19 +303,19 @@ | |||
303 | fsl,pins = < | 303 | fsl,pins = < |
304 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 304 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
305 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 305 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
306 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 306 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
307 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 307 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
308 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 308 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
309 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 309 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
310 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 310 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
311 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 311 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
312 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 312 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
313 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 313 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
314 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 314 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
315 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 315 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
316 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 316 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
317 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 317 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
318 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 318 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
319 | MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8 | 319 | MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8 |
320 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 | 320 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 |
321 | >; | 321 | >; |
diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts index 0511137d1e23..747bc104ad00 100644 --- a/arch/arm/boot/dts/imx6q-gw5400-a.dts +++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts | |||
@@ -421,18 +421,18 @@ | |||
421 | 421 | ||
422 | pinctrl_enet: enetgrp { | 422 | pinctrl_enet: enetgrp { |
423 | fsl,pins = < | 423 | fsl,pins = < |
424 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 424 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
425 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 425 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
426 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 426 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
427 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 427 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
428 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 428 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
429 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 429 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
430 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 430 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
431 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 431 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
432 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 432 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
433 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 433 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
434 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 434 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
435 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 435 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
436 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 436 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
437 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 437 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
438 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 438 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts index 3f8013c85fb9..f7995c513b67 100644 --- a/arch/arm/boot/dts/imx6q-marsboard.dts +++ b/arch/arm/boot/dts/imx6q-marsboard.dts | |||
@@ -252,26 +252,26 @@ | |||
252 | fsl,pins = < | 252 | fsl,pins = < |
253 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 253 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
254 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 254 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
255 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 255 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
256 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 256 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
257 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 257 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
258 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 258 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
259 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 259 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
260 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 260 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
261 | /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ | 261 | /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ |
262 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 | 262 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 |
263 | /* AR8035 pin strapping: IO voltage: pull up */ | 263 | /* AR8035 pin strapping: IO voltage: pull up */ |
264 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 264 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
265 | /* AR8035 pin strapping: PHYADDR#0: pull down */ | 265 | /* AR8035 pin strapping: PHYADDR#0: pull down */ |
266 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 | 266 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 |
267 | /* AR8035 pin strapping: PHYADDR#1: pull down */ | 267 | /* AR8035 pin strapping: PHYADDR#1: pull down */ |
268 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 | 268 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 |
269 | /* AR8035 pin strapping: MODE#1: pull up */ | 269 | /* AR8035 pin strapping: MODE#1: pull up */ |
270 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 270 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
271 | /* AR8035 pin strapping: MODE#3: pull up */ | 271 | /* AR8035 pin strapping: MODE#3: pull up */ |
272 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 272 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
273 | /* AR8035 pin strapping: MODE#0: pull down */ | 273 | /* AR8035 pin strapping: MODE#0: pull down */ |
274 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 | 274 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030 |
275 | /* GPIO16 -> AR8035 25MHz */ | 275 | /* GPIO16 -> AR8035 25MHz */ |
276 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 276 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
277 | /* RGMII_nRST */ | 277 | /* RGMII_nRST */ |
diff --git a/arch/arm/boot/dts/imx6q-novena.dts b/arch/arm/boot/dts/imx6q-novena.dts index 5acd0c63b33b..1723e89e3acc 100644 --- a/arch/arm/boot/dts/imx6q-novena.dts +++ b/arch/arm/boot/dts/imx6q-novena.dts | |||
@@ -549,12 +549,12 @@ | |||
549 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028 | 549 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028 |
550 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028 | 550 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028 |
551 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 551 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
552 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 552 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
553 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 553 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
554 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 554 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
555 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 555 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
556 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 556 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
557 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 557 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
558 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 558 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
559 | /* Ethernet reset */ | 559 | /* Ethernet reset */ |
560 | MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1 | 560 | MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1 |
diff --git a/arch/arm/boot/dts/imx6q-sbc6x.dts b/arch/arm/boot/dts/imx6q-sbc6x.dts index 86cf09364664..255733063ea4 100644 --- a/arch/arm/boot/dts/imx6q-sbc6x.dts +++ b/arch/arm/boot/dts/imx6q-sbc6x.dts | |||
@@ -31,19 +31,19 @@ | |||
31 | fsl,pins = < | 31 | fsl,pins = < |
32 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 32 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
33 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 33 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
34 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 34 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
35 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 35 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
36 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 36 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
37 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 37 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
38 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 38 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
39 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 39 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
40 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 40 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
41 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 41 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
42 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 42 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
43 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 43 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
44 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 44 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
45 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 45 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
46 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 46 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
47 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 47 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
48 | >; | 48 | >; |
49 | }; | 49 | }; |
diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts index d7c8ccb2da95..06f492e17ca7 100644 --- a/arch/arm/boot/dts/imx6q-tbs2910.dts +++ b/arch/arm/boot/dts/imx6q-tbs2910.dts | |||
@@ -284,19 +284,19 @@ | |||
284 | fsl,pins = < | 284 | fsl,pins = < |
285 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 285 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
286 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 286 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
287 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 287 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
288 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 288 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
289 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 289 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
290 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 290 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
291 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 291 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
292 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 292 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
293 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 293 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
294 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 294 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
295 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 295 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
296 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 296 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
297 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 297 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
298 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 298 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
299 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 299 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
300 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 300 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
301 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 | 301 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 |
302 | >; | 302 | >; |
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 315e033ff1d8..99e323b57261 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi | |||
@@ -586,19 +586,19 @@ | |||
586 | fsl,pins = < | 586 | fsl,pins = < |
587 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 | 587 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
588 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 | 588 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
589 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 | 589 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
590 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 | 590 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 |
591 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 | 591 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 |
592 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 | 592 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 |
593 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 | 593 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 |
594 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 | 594 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 |
595 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 | 595 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
596 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 596 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
597 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 597 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
598 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 598 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
599 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 599 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
600 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 600 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
601 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 601 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
602 | /* Ethernet PHY reset */ | 602 | /* Ethernet PHY reset */ |
603 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 | 603 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 |
604 | /* Ethernet PHY interrupt */ | 604 | /* Ethernet PHY interrupt */ |
diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi index da1341d47b14..b2c083d57598 100644 --- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi +++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi | |||
@@ -67,18 +67,18 @@ | |||
67 | 67 | ||
68 | pinctrl_enet: enetgrp { | 68 | pinctrl_enet: enetgrp { |
69 | fsl,pins = < | 69 | fsl,pins = < |
70 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 70 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
71 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 71 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
72 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 72 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
73 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 73 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
74 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 74 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
75 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 75 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
76 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 76 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
77 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 77 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
78 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 78 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
79 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 79 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
80 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 80 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
81 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 81 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
82 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 82 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
83 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 83 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
84 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 84 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi index 1340e2760406..afec2c7628ef 100644 --- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | |||
@@ -238,18 +238,18 @@ | |||
238 | imx6qdl-gw51xx { | 238 | imx6qdl-gw51xx { |
239 | pinctrl_enet: enetgrp { | 239 | pinctrl_enet: enetgrp { |
240 | fsl,pins = < | 240 | fsl,pins = < |
241 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 241 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
242 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 242 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
243 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 243 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
244 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 244 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
245 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 245 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
246 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 246 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
247 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 247 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
248 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 248 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
249 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 249 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
250 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 250 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
251 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 251 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
252 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 252 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
253 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 253 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
254 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 254 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
255 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 255 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi index 8bf1020affa0..208e3c291165 100644 --- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | |||
@@ -382,18 +382,18 @@ | |||
382 | 382 | ||
383 | pinctrl_enet: enetgrp { | 383 | pinctrl_enet: enetgrp { |
384 | fsl,pins = < | 384 | fsl,pins = < |
385 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 385 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
386 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 386 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
387 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 387 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
388 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 388 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
389 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 389 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
390 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 390 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
391 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 391 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
392 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 392 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
393 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 393 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
394 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 394 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
395 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 395 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
396 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 396 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
397 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 397 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
398 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 398 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
399 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 399 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi index a3dd0c41b995..35b9e808a4bb 100644 --- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | |||
@@ -371,18 +371,18 @@ | |||
371 | 371 | ||
372 | pinctrl_enet: enetgrp { | 372 | pinctrl_enet: enetgrp { |
373 | fsl,pins = < | 373 | fsl,pins = < |
374 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 374 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
375 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 375 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
376 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 376 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
377 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 377 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
378 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 378 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
379 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 379 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
380 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 380 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
381 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 381 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
382 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 382 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
383 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 383 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
384 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 384 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
385 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 385 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
386 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 386 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
387 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 387 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
388 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 388 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi index 5a8dbabbd20f..5f8f1ea6d2a2 100644 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | |||
@@ -478,18 +478,18 @@ | |||
478 | 478 | ||
479 | pinctrl_enet: enetgrp { | 479 | pinctrl_enet: enetgrp { |
480 | fsl,pins = < | 480 | fsl,pins = < |
481 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 481 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
482 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 482 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
483 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 483 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
484 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 484 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
485 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 485 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
486 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 486 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
487 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 487 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
488 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 488 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
489 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 489 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
490 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 490 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
491 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 491 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
492 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 492 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
493 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 493 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
494 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 494 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
495 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 495 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi index f8d945a56525..d5c3aa88adbe 100644 --- a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | |||
@@ -254,19 +254,19 @@ | |||
254 | fsl,pins = < | 254 | fsl,pins = < |
255 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 255 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
256 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 256 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
257 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 257 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
258 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 258 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
259 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 259 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
260 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 260 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
261 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 261 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
262 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 262 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
263 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 263 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
264 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 264 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
265 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 265 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
266 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 266 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
267 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 267 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
268 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 268 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
269 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 269 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
270 | MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 | 270 | MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 |
271 | >; | 271 | >; |
272 | }; | 272 | }; |
diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi index cfd50ea1ed48..880bd782a5b7 100644 --- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi | |||
@@ -361,12 +361,12 @@ | |||
361 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 | 361 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 |
362 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 | 362 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 |
363 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 | 363 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
364 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 364 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
365 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 365 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
366 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 366 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
367 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 367 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
368 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 368 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
369 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 369 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
370 | /* Phy reset */ | 370 | /* Phy reset */ |
371 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 | 371 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 |
372 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 | 372 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi index 9677bf323823..b0b3220a1fd9 100644 --- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi +++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi | |||
@@ -484,19 +484,19 @@ | |||
484 | fsl,pins = < | 484 | fsl,pins = < |
485 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 | 485 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
486 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 | 486 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
487 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 | 487 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
488 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 | 488 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 |
489 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 | 489 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 |
490 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 | 490 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 |
491 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 | 491 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 |
492 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 | 492 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 |
493 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 | 493 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
494 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 494 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
495 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 495 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
496 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 496 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
497 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 497 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
498 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 498 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
499 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 499 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
500 | /* Phy reset */ | 500 | /* Phy reset */ |
501 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 | 501 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 |
502 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 | 502 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi index 97d9c333902b..db868bc42c0f 100644 --- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi +++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | |||
@@ -394,19 +394,19 @@ | |||
394 | fsl,pins = < | 394 | fsl,pins = < |
395 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 | 395 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
396 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 | 396 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
397 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 | 397 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
398 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 | 398 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 |
399 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 | 399 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 |
400 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 | 400 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 |
401 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 | 401 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 |
402 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 | 402 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 |
403 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 | 403 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
404 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 404 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
405 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 405 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
406 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 406 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
407 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 407 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
408 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 408 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
409 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 409 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
410 | /* Phy reset */ | 410 | /* Phy reset */ |
411 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0 | 411 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0 |
412 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 | 412 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index d6d98d426384..e4b894c61a95 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | |||
@@ -231,19 +231,19 @@ | |||
231 | fsl,pins = < | 231 | fsl,pins = < |
232 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 232 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
233 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 233 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
234 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 234 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
235 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 235 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
236 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 236 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
237 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 237 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
238 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 238 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
239 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 239 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
240 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 240 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
241 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 241 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
242 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 242 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
243 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 243 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
244 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 244 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
245 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 245 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
246 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 246 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
247 | MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 | 247 | MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 |
248 | >; | 248 | >; |
249 | }; | 249 | }; |
diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi index cacf5933707d..17704a5c1bcb 100644 --- a/arch/arm/boot/dts/imx6qdl-rex.dtsi +++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi | |||
@@ -196,19 +196,19 @@ | |||
196 | fsl,pins = < | 196 | fsl,pins = < |
197 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 197 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
198 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 198 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
199 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 199 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
200 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 200 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
201 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 201 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
202 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 202 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
203 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 203 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
204 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 204 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
205 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 205 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
206 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 206 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
207 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 207 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
208 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 208 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
209 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 209 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
210 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 210 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
211 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 211 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
212 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 212 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
213 | /* Phy reset */ | 213 | /* Phy reset */ |
214 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 | 214 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 6aa193fb283f..e000e6f12bf5 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | |||
@@ -345,19 +345,19 @@ | |||
345 | fsl,pins = < | 345 | fsl,pins = < |
346 | MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 | 346 | MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 |
347 | MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 | 347 | MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 |
348 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 348 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
349 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 349 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
350 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 350 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
351 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 351 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
352 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 352 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
353 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 353 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
354 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 354 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
355 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 355 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
356 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 356 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
357 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 357 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
358 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 358 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
359 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 359 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
360 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 360 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
361 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 | 361 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
362 | >; | 362 | >; |
363 | }; | 363 | }; |
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index f65fdfc2536d..81dd6cd1937d 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | |||
@@ -359,19 +359,19 @@ | |||
359 | fsl,pins = < | 359 | fsl,pins = < |
360 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 | 360 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
361 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 | 361 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
362 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 | 362 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
363 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 | 363 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 |
364 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 | 364 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 |
365 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 | 365 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 |
366 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 | 366 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 |
367 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 | 367 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 |
368 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 | 368 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
369 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 369 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
370 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 370 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
371 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 371 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
372 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 372 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
373 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 373 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
374 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 374 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
375 | /* Phy reset */ | 375 | /* Phy reset */ |
376 | MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 | 376 | MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 |
377 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 | 377 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index d77ea9423bbc..8e9e0d98db2f 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi | |||
@@ -380,19 +380,19 @@ | |||
380 | fsl,pins = < | 380 | fsl,pins = < |
381 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 381 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
382 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 382 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
383 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 383 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
384 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 384 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
385 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 385 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
386 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 386 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
387 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 387 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
388 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 388 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
389 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 389 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
390 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 390 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
391 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 391 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
392 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 392 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
393 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 393 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
394 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 394 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
395 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 395 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
396 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 396 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
397 | >; | 397 | >; |
398 | }; | 398 | }; |
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi index 3bee2f910067..c96c91d83678 100644 --- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi +++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi | |||
@@ -132,18 +132,18 @@ | |||
132 | imx6q-udoo { | 132 | imx6q-udoo { |
133 | pinctrl_enet: enetgrp { | 133 | pinctrl_enet: enetgrp { |
134 | fsl,pins = < | 134 | fsl,pins = < |
135 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 135 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
136 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 136 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
137 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 137 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
138 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 138 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
139 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 139 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
140 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 140 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
141 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 141 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
142 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 142 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
143 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 143 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
144 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 144 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
145 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 145 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
146 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 146 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
147 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 147 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
148 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 148 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
149 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 149 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi index 3ffe00c557f1..2b9c2be436f9 100644 --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi | |||
@@ -109,19 +109,19 @@ | |||
109 | fsl,pins = < | 109 | fsl,pins = < |
110 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 110 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
111 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 111 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
112 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 112 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
113 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 113 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
114 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 114 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
115 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 115 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
116 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 116 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
117 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 117 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
118 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 118 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
119 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 119 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
120 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 120 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
121 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 121 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
122 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 122 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
123 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 123 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
124 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 124 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
125 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 125 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
126 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 | 126 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
127 | >; | 127 | >; |