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authorArnd Bergmann <arnd@arndb.de>2016-09-19 11:40:13 -0400
committerArnd Bergmann <arnd@arndb.de>2016-09-19 11:40:13 -0400
commit71e84db1aab65ba71cb6d6d26b0f1e0d2eacc65b (patch)
tree1a6245bdac94571377339b87249f68bffa2b99bc /arch/arm/boot
parent590b9066185aebfd280bb94b033cf1ed44ac467e (diff)
parenta2a2b8215621536a7620e31f36bede81bb86680b (diff)
Merge tag 'omap-for-v4.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "omap dts updates for v4.9 merge window, part 2" from Tony Lindgren: Part two of device tree changes for omaps for v4.9 merge window. This is mostly usability and non-critical fixes except for the addition of beagleboard-x15 rev B1 support: - Fix omap4 pandaboard SDIO WLAN latencies in idle mode by enabling wakeirq - Usability fixes for WLAN, USB, LEDs and power button on omap5 boards - Remove am57xx beagleboard-x15 pinmux configuration as the processor requires that it's done in IO isolation in bootloader except for MMC and DCAN - Add support for beagleboard-x15 rev B1 by moving most of the configuration to am57xx-beagle-x15-common.dtsi - Enable support for more than 2GB of memory for omap5 with LPAE with #address-cells - Fix omap3-gta04 backlight PWM frequency until the PWM driver - Revert am335x dts changes related to cpufreq as the driver changes still have not merged and the dts changes broke cpufreq * tag 'omap-for-v4.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: Revert "ARM: dts: dra7: Move to operating-points-v2 table" Revert "ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq driver" Revert "ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu" ARM: dts: omap3-gta04: reduce panel backlight PWM frequency to 83Hz ARM: dts: Add support for more than 2GB of memory for omap5 ARM: dts: am57xx-beagle-x15: Add support for rev B1 ARM: dts: am57xx-beagle-x15: Remove pinmux configurations for erratum i869 ARM: dts: Fix LEDs for igepv5 ARM: dts: Add power button support for igepv5 ARM: dts: Configure omap5 OTG ID pin ARM: dts: ARM: dts: Fix omap5 SDIO dat1 interrupt ARM: dts: Configure panda SDIO WLAN wakeirq
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/am335x-boneblack.dts11
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi88
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi596
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts24
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts812
-rw-r--r--arch/arm/boot/dts/dra7.dtsi26
-rw-r--r--arch/arm/boot/dts/dra74x.dtsi1
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dtsi2
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5-board-common.dtsi29
-rw-r--r--arch/arm/boot/dts/omap5-cm-t54.dts2
-rw-r--r--arch/arm/boot/dts/omap5-igep0050.dts40
-rw-r--r--arch/arm/boot/dts/omap5-uevm.dts16
-rw-r--r--arch/arm/boot/dts/omap5.dtsi24
15 files changed, 731 insertions, 943 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 2fcd6a10b070..cf989f264de0 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -584,6 +584,7 @@ dtb-$(CONFIG_SOC_OMAP5) += \
584 omap5-uevm.dtb 584 omap5-uevm.dtb
585dtb-$(CONFIG_SOC_DRA7XX) += \ 585dtb-$(CONFIG_SOC_DRA7XX) += \
586 am57xx-beagle-x15.dtb \ 586 am57xx-beagle-x15.dtb \
587 am57xx-beagle-x15-revb1.dtb \
587 am57xx-cl-som-am57x.dtb \ 588 am57xx-cl-som-am57x.dtb \
588 am57xx-sbc-am57x.dtb \ 589 am57xx-sbc-am57x.dtb \
589 am572x-idk.dtb \ 590 am572x-idk.dtb \
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index ca721670bd91..55c0e954b146 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -33,17 +33,6 @@
33 status = "okay"; 33 status = "okay";
34}; 34};
35 35
36&cpu0_opp_table {
37 /*
38 * All PG 2.0 silicon may not support 1GHz but some of the early
39 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
40 * to support 1GHz OPP so enable it for PG 2.0 on this board.
41 */
42 oppnitro@1000000000 {
43 opp-supported-hw = <0x06 0x0100>;
44 };
45};
46
47&am33xx_pinmux { 36&am33xx_pinmux {
48 nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { 37 nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
49 pinctrl-single,pins = < 38 pinctrl-single,pins = <
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index eeef6bc8e410..194d884c9de1 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -45,9 +45,19 @@
45 device_type = "cpu"; 45 device_type = "cpu";
46 reg = <0>; 46 reg = <0>;
47 47
48 operating-points-v2 = <&cpu0_opp_table>; 48 /*
49 ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>; 49 * To consider voltage drop between PMIC and SoC,
50 ti,syscon-rev = <&scm_conf 0x600>; 50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
51 61
52 clocks = <&dpll_mpu_ck>; 62 clocks = <&dpll_mpu_ck>;
53 clock-names = "cpu"; 63 clock-names = "cpu";
@@ -56,78 +66,6 @@
56 }; 66 };
57 }; 67 };
58 68
59 cpu0_opp_table: opp_table0 {
60 compatible = "operating-points-v2";
61
62 /*
63 * The three following nodes are marked with opp-suspend
64 * because the can not be enabled simultaneously on a
65 * single SoC.
66 */
67 opp50@300000000 {
68 opp-hz = /bits/ 64 <300000000>;
69 opp-microvolt = <950000 931000 969000>;
70 opp-supported-hw = <0x06 0x0010>;
71 opp-suspend;
72 };
73
74 opp100@275000000 {
75 opp-hz = /bits/ 64 <275000000>;
76 opp-microvolt = <1100000 1078000 1122000>;
77 opp-supported-hw = <0x01 0x00FF>;
78 opp-suspend;
79 };
80
81 opp100@300000000 {
82 opp-hz = /bits/ 64 <300000000>;
83 opp-microvolt = <1100000 1078000 1122000>;
84 opp-supported-hw = <0x06 0x0020>;
85 opp-suspend;
86 };
87
88 opp100@500000000 {
89 opp-hz = /bits/ 64 <500000000>;
90 opp-microvolt = <1100000 1078000 1122000>;
91 opp-supported-hw = <0x01 0xFFFF>;
92 };
93
94 opp100@600000000 {
95 opp-hz = /bits/ 64 <600000000>;
96 opp-microvolt = <1100000 1078000 1122000>;
97 opp-supported-hw = <0x06 0x0040>;
98 };
99
100 opp120@600000000 {
101 opp-hz = /bits/ 64 <600000000>;
102 opp-microvolt = <1200000 1176000 1224000>;
103 opp-supported-hw = <0x01 0xFFFF>;
104 };
105
106 opp120@720000000 {
107 opp-hz = /bits/ 64 <720000000>;
108 opp-microvolt = <1200000 1176000 1224000>;
109 opp-supported-hw = <0x06 0x0080>;
110 };
111
112 oppturbo@720000000 {
113 opp-hz = /bits/ 64 <720000000>;
114 opp-microvolt = <1260000 1234800 1285200>;
115 opp-supported-hw = <0x01 0xFFFF>;
116 };
117
118 oppturbo@800000000 {
119 opp-hz = /bits/ 64 <800000000>;
120 opp-microvolt = <1260000 1234800 1285200>;
121 opp-supported-hw = <0x06 0x0100>;
122 };
123
124 oppnitro@1000000000 {
125 opp-hz = /bits/ 64 <1000000000>;
126 opp-microvolt = <1325000 1298500 1351500>;
127 opp-supported-hw = <0x04 0x0200>;
128 };
129 };
130
131 pmu { 69 pmu {
132 compatible = "arm,cortex-a8-pmu"; 70 compatible = "arm,cortex-a8-pmu";
133 interrupts = <3>; 71 interrupts = <3>;
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
new file mode 100644
index 000000000000..ec85ff9004e8
--- /dev/null
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
@@ -0,0 +1,596 @@
1/*
2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "dra74x.dtsi"
11#include "am57xx-commercial-grade.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14
15/ {
16 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
17
18 aliases {
19 rtc0 = &mcp_rtc;
20 rtc1 = &tps659038_rtc;
21 rtc2 = &rtc;
22 display0 = &hdmi0;
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x80000000 0x0 0x80000000>;
28 };
29
30 vdd_3v3: fixedregulator-vdd_3v3 {
31 compatible = "regulator-fixed";
32 regulator-name = "vdd_3v3";
33 vin-supply = <&regen1>;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 };
37
38 aic_dvdd: fixedregulator-aic_dvdd {
39 compatible = "regulator-fixed";
40 regulator-name = "aic_dvdd_fixed";
41 vin-supply = <&vdd_3v3>;
42 regulator-min-microvolt = <1800000>;
43 regulator-max-microvolt = <1800000>;
44 };
45
46 vtt_fixed: fixedregulator-vtt {
47 /* TPS51200 */
48 compatible = "regulator-fixed";
49 regulator-name = "vtt_fixed";
50 vin-supply = <&smps3_reg>;
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
54 regulator-boot-on;
55 enable-active-high;
56 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
57 };
58
59 leds {
60 compatible = "gpio-leds";
61
62 led0 {
63 label = "beagle-x15:usr0";
64 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "heartbeat";
66 default-state = "off";
67 };
68
69 led1 {
70 label = "beagle-x15:usr1";
71 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
72 linux,default-trigger = "cpu0";
73 default-state = "off";
74 };
75
76 led2 {
77 label = "beagle-x15:usr2";
78 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger = "mmc0";
80 default-state = "off";
81 };
82
83 led3 {
84 label = "beagle-x15:usr3";
85 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
86 linux,default-trigger = "disk-activity";
87 default-state = "off";
88 };
89 };
90
91 gpio_fan: gpio_fan {
92 /* Based on 5v 500mA AFB02505HHB */
93 compatible = "gpio-fan";
94 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
95 gpio-fan,speed-map = <0 0>,
96 <13000 1>;
97 #cooling-cells = <2>;
98 };
99
100 hdmi0: connector {
101 compatible = "hdmi-connector";
102 label = "hdmi";
103
104 type = "a";
105
106 port {
107 hdmi_connector_in: endpoint {
108 remote-endpoint = <&tpd12s015_out>;
109 };
110 };
111 };
112
113 tpd12s015: encoder {
114 compatible = "ti,tpd12s015";
115
116 ports {
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 port@0 {
121 reg = <0>;
122
123 tpd12s015_in: endpoint {
124 remote-endpoint = <&hdmi_out>;
125 };
126 };
127
128 port@1 {
129 reg = <1>;
130
131 tpd12s015_out: endpoint {
132 remote-endpoint = <&hdmi_connector_in>;
133 };
134 };
135 };
136 };
137
138 sound0: sound0 {
139 compatible = "simple-audio-card";
140 simple-audio-card,name = "BeagleBoard-X15";
141 simple-audio-card,widgets =
142 "Line", "Line Out",
143 "Line", "Line In";
144 simple-audio-card,routing =
145 "Line Out", "LLOUT",
146 "Line Out", "RLOUT",
147 "MIC2L", "Line In",
148 "MIC2R", "Line In";
149 simple-audio-card,format = "dsp_b";
150 simple-audio-card,bitclock-master = <&sound0_master>;
151 simple-audio-card,frame-master = <&sound0_master>;
152 simple-audio-card,bitclock-inversion;
153
154 simple-audio-card,cpu {
155 sound-dai = <&mcasp3>;
156 };
157
158 sound0_master: simple-audio-card,codec {
159 sound-dai = <&tlv320aic3104>;
160 clocks = <&clkout2_clk>;
161 };
162 };
163};
164
165&dra7_pmx_core {
166 mmc1_pins_default: mmc1_pins_default {
167 pinctrl-single,pins = <
168 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
169 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
170 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
171 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
172 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
173 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
174 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
175 >;
176 };
177
178 mmc2_pins_default: mmc2_pins_default {
179 pinctrl-single,pins = <
180 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
181 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
182 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
183 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
184 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
185 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
186 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
187 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
188 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
189 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
190 >;
191 };
192};
193&i2c1 {
194 status = "okay";
195 clock-frequency = <400000>;
196
197 tps659038: tps659038@58 {
198 compatible = "ti,tps659038";
199 reg = <0x58>;
200 interrupt-parent = <&gpio1>;
201 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
202
203 #interrupt-cells = <2>;
204 interrupt-controller;
205
206 ti,system-power-controller;
207
208 tps659038_pmic {
209 compatible = "ti,tps659038-pmic";
210
211 regulators {
212 smps12_reg: smps12 {
213 /* VDD_MPU */
214 regulator-name = "smps12";
215 regulator-min-microvolt = < 850000>;
216 regulator-max-microvolt = <1250000>;
217 regulator-always-on;
218 regulator-boot-on;
219 };
220
221 smps3_reg: smps3 {
222 /* VDD_DDR */
223 regulator-name = "smps3";
224 regulator-min-microvolt = <1350000>;
225 regulator-max-microvolt = <1350000>;
226 regulator-always-on;
227 regulator-boot-on;
228 };
229
230 smps45_reg: smps45 {
231 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
232 regulator-name = "smps45";
233 regulator-min-microvolt = < 850000>;
234 regulator-max-microvolt = <1250000>;
235 regulator-always-on;
236 regulator-boot-on;
237 };
238
239 smps6_reg: smps6 {
240 /* VDD_CORE */
241 regulator-name = "smps6";
242 regulator-min-microvolt = <850000>;
243 regulator-max-microvolt = <1150000>;
244 regulator-always-on;
245 regulator-boot-on;
246 };
247
248 /* SMPS7 unused */
249
250 smps8_reg: smps8 {
251 /* VDD_1V8 */
252 regulator-name = "smps8";
253 regulator-min-microvolt = <1800000>;
254 regulator-max-microvolt = <1800000>;
255 regulator-always-on;
256 regulator-boot-on;
257 };
258
259 /* SMPS9 unused */
260
261 ldo1_reg: ldo1 {
262 /* VDD_SD / VDDSHV8 */
263 regulator-name = "ldo1";
264 regulator-min-microvolt = <1800000>;
265 regulator-max-microvolt = <3300000>;
266 regulator-boot-on;
267 regulator-always-on;
268 };
269
270 ldo2_reg: ldo2 {
271 /* VDD_SHV5 */
272 regulator-name = "ldo2";
273 regulator-min-microvolt = <3300000>;
274 regulator-max-microvolt = <3300000>;
275 regulator-always-on;
276 regulator-boot-on;
277 };
278
279 ldo3_reg: ldo3 {
280 /* VDDA_1V8_PHYA */
281 regulator-name = "ldo3";
282 regulator-min-microvolt = <1800000>;
283 regulator-max-microvolt = <1800000>;
284 regulator-always-on;
285 regulator-boot-on;
286 };
287
288 ldo4_reg: ldo4 {
289 /* VDDA_1V8_PHYB */
290 regulator-name = "ldo4";
291 regulator-min-microvolt = <1800000>;
292 regulator-max-microvolt = <1800000>;
293 regulator-always-on;
294 regulator-boot-on;
295 };
296
297 ldo9_reg: ldo9 {
298 /* VDD_RTC */
299 regulator-name = "ldo9";
300 regulator-min-microvolt = <1050000>;
301 regulator-max-microvolt = <1050000>;
302 regulator-always-on;
303 regulator-boot-on;
304 };
305
306 ldoln_reg: ldoln {
307 /* VDDA_1V8_PLL */
308 regulator-name = "ldoln";
309 regulator-min-microvolt = <1800000>;
310 regulator-max-microvolt = <1800000>;
311 regulator-always-on;
312 regulator-boot-on;
313 };
314
315 ldousb_reg: ldousb {
316 /* VDDA_3V_USB: VDDA_USBHS33 */
317 regulator-name = "ldousb";
318 regulator-min-microvolt = <3300000>;
319 regulator-max-microvolt = <3300000>;
320 regulator-boot-on;
321 };
322
323 regen1: regen1 {
324 /* VDD_3V3_ON */
325 regulator-name = "regen1";
326 regulator-boot-on;
327 regulator-always-on;
328 };
329 };
330 };
331
332 tps659038_rtc: tps659038_rtc {
333 compatible = "ti,palmas-rtc";
334 interrupt-parent = <&tps659038>;
335 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
336 wakeup-source;
337 };
338
339 tps659038_pwr_button: tps659038_pwr_button {
340 compatible = "ti,palmas-pwrbutton";
341 interrupt-parent = <&tps659038>;
342 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
343 wakeup-source;
344 ti,palmas-long-press-seconds = <12>;
345 };
346
347 tps659038_gpio: tps659038_gpio {
348 compatible = "ti,palmas-gpio";
349 gpio-controller;
350 #gpio-cells = <2>;
351 };
352
353 extcon_usb2: tps659038_usb {
354 compatible = "ti,palmas-usb-vid";
355 ti,enable-vbus-detection;
356 vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
357 };
358
359 };
360
361 tmp102: tmp102@48 {
362 compatible = "ti,tmp102";
363 reg = <0x48>;
364 interrupt-parent = <&gpio7>;
365 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
366 #thermal-sensor-cells = <1>;
367 };
368
369 tlv320aic3104: tlv320aic3104@18 {
370 #sound-dai-cells = <0>;
371 compatible = "ti,tlv320aic3104";
372 reg = <0x18>;
373 assigned-clocks = <&clkoutmux2_clk_mux>;
374 assigned-clock-parents = <&sys_clk2_dclk_div>;
375
376 status = "okay";
377 adc-settle-ms = <40>;
378
379 AVDD-supply = <&vdd_3v3>;
380 IOVDD-supply = <&vdd_3v3>;
381 DRVDD-supply = <&vdd_3v3>;
382 DVDD-supply = <&aic_dvdd>;
383 };
384
385 eeprom: eeprom@50 {
386 compatible = "at,24c32";
387 reg = <0x50>;
388 };
389};
390
391&i2c3 {
392 status = "okay";
393 clock-frequency = <400000>;
394
395 mcp_rtc: rtc@6f {
396 compatible = "microchip,mcp7941x";
397 reg = <0x6f>;
398 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
399 <&dra7_pmx_core 0x424>;
400 interrupt-names = "irq", "wakeup";
401
402 vcc-supply = <&vdd_3v3>;
403 wakeup-source;
404 };
405};
406
407&gpio7 {
408 ti,no-reset-on-init;
409 ti,no-idle-on-init;
410};
411
412&cpu0 {
413 cpu0-supply = <&smps12_reg>;
414 voltage-tolerance = <1>;
415};
416
417&uart3 {
418 status = "okay";
419 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
420 <&dra7_pmx_core 0x3f8>;
421};
422
423&mac {
424 status = "okay";
425 dual_emac;
426};
427
428&cpsw_emac0 {
429 phy_id = <&davinci_mdio>, <1>;
430 phy-mode = "rgmii";
431 dual_emac_res_vlan = <1>;
432};
433
434&cpsw_emac1 {
435 phy_id = <&davinci_mdio>, <2>;
436 phy-mode = "rgmii";
437 dual_emac_res_vlan = <2>;
438};
439
440&mmc1 {
441 status = "okay";
442
443 pinctrl-names = "default";
444 pinctrl-0 = <&mmc1_pins_default>;
445
446 bus-width = <4>;
447 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
448};
449
450&mmc2 {
451 status = "okay";
452
453 pinctrl-names = "default";
454 pinctrl-0 = <&mmc1_pins_default>;
455
456 vmmc-supply = <&vdd_3v3>;
457 bus-width = <8>;
458 ti,non-removable;
459 cap-mmc-dual-data-rate;
460};
461
462&sata {
463 status = "okay";
464};
465
466&usb2_phy1 {
467 phy-supply = <&ldousb_reg>;
468};
469
470&usb2_phy2 {
471 phy-supply = <&ldousb_reg>;
472};
473
474&usb1 {
475 dr_mode = "host";
476};
477
478&omap_dwc3_2 {
479 extcon = <&extcon_usb2>;
480};
481
482&usb2 {
483 /*
484 * Stand alone usage is peripheral only.
485 * However, with some resistor modifications
486 * this port can be used via expansion connectors
487 * as "host" or "dual-role". If so, provide
488 * the necessary dr_mode override in the expansion
489 * board's DT.
490 */
491 dr_mode = "peripheral";
492};
493
494&cpu_trips {
495 cpu_alert1: cpu_alert1 {
496 temperature = <50000>; /* millicelsius */
497 hysteresis = <2000>; /* millicelsius */
498 type = "active";
499 };
500};
501
502&cpu_cooling_maps {
503 map1 {
504 trip = <&cpu_alert1>;
505 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
506 };
507};
508
509&thermal_zones {
510 board_thermal: board_thermal {
511 polling-delay-passive = <1250>; /* milliseconds */
512 polling-delay = <1500>; /* milliseconds */
513
514 /* sensor ID */
515 thermal-sensors = <&tmp102 0>;
516
517 board_trips: trips {
518 board_alert0: board_alert {
519 temperature = <40000>; /* millicelsius */
520 hysteresis = <2000>; /* millicelsius */
521 type = "active";
522 };
523
524 board_crit: board_crit {
525 temperature = <105000>; /* millicelsius */
526 hysteresis = <0>; /* millicelsius */
527 type = "critical";
528 };
529 };
530
531 board_cooling_maps: cooling-maps {
532 map0 {
533 trip = <&board_alert0>;
534 cooling-device =
535 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
536 };
537 };
538 };
539};
540
541&dss {
542 status = "ok";
543
544 vdda_video-supply = <&ldoln_reg>;
545};
546
547&hdmi {
548 status = "ok";
549 vdda-supply = <&ldo4_reg>;
550
551 port {
552 hdmi_out: endpoint {
553 remote-endpoint = <&tpd12s015_in>;
554 };
555 };
556};
557
558&pcie1 {
559 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
560};
561
562&mcasp3 {
563 #sound-dai-cells = <0>;
564 assigned-clocks = <&mcasp3_ahclkx_mux>;
565 assigned-clock-parents = <&sys_clkin2>;
566 status = "okay";
567
568 op-mode = <0>; /* MCASP_IIS_MODE */
569 tdm-slots = <2>;
570 /* 4 serializers */
571 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
572 1 2 0 0
573 >;
574 tx-num-evt = <32>;
575 rx-num-evt = <32>;
576};
577
578&mailbox5 {
579 status = "okay";
580 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
581 status = "okay";
582 };
583 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
584 status = "okay";
585 };
586};
587
588&mailbox6 {
589 status = "okay";
590 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
591 status = "okay";
592 };
593 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
594 status = "okay";
595 };
596};
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
new file mode 100644
index 000000000000..ca85570629fd
--- /dev/null
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
@@ -0,0 +1,24 @@
1/*
2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "am57xx-beagle-x15-common.dtsi"
10
11/ {
12 model = "TI AM5728 BeagleBoard-X15 rev B1";
13};
14
15&tpd12s015 {
16 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
17 <&gpio2 30 GPIO_ACTIVE_HIGH>, /* gpio2_30, LS OE */
18 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
19};
20
21&mmc1 {
22 vmmc-supply = <&vdd_3v3>;
23 vmmc-aux-supply = <&ldo1_reg>;
24};
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 9067ca092dc5..8c66f2efd283 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -1,822 +1,24 @@
1/* 1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8/dts-v1/;
9 8
10#include "dra74x.dtsi" 9#include "am57xx-beagle-x15-common.dtsi"
11#include "am57xx-commercial-grade.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14 10
15/ { 11/ {
12 /* NOTE: This describes the "original" pre-production A2 revision */
16 model = "TI AM5728 BeagleBoard-X15"; 13 model = "TI AM5728 BeagleBoard-X15";
17 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
18
19 aliases {
20 rtc0 = &mcp_rtc;
21 rtc1 = &tps659038_rtc;
22 rtc2 = &rtc;
23 display0 = &hdmi0;
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x0 0x80000000 0x0 0x80000000>;
29 };
30
31 vdd_3v3: fixedregulator-vdd_3v3 {
32 compatible = "regulator-fixed";
33 regulator-name = "vdd_3v3";
34 vin-supply = <&regen1>;
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
37 };
38
39 aic_dvdd: fixedregulator-aic_dvdd {
40 compatible = "regulator-fixed";
41 regulator-name = "aic_dvdd_fixed";
42 vin-supply = <&vdd_3v3>;
43 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <1800000>;
45 };
46
47 vtt_fixed: fixedregulator-vtt {
48 /* TPS51200 */
49 compatible = "regulator-fixed";
50 regulator-name = "vtt_fixed";
51 vin-supply = <&smps3_reg>;
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 regulator-always-on;
55 regulator-boot-on;
56 enable-active-high;
57 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
58 };
59
60 leds {
61 compatible = "gpio-leds";
62 pinctrl-names = "default";
63 pinctrl-0 = <&leds_pins_default>;
64
65 led0 {
66 label = "beagle-x15:usr0";
67 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 default-state = "off";
70 };
71
72 led1 {
73 label = "beagle-x15:usr1";
74 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
75 linux,default-trigger = "cpu0";
76 default-state = "off";
77 };
78
79 led2 {
80 label = "beagle-x15:usr2";
81 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
82 linux,default-trigger = "mmc0";
83 default-state = "off";
84 };
85
86 led3 {
87 label = "beagle-x15:usr3";
88 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
89 linux,default-trigger = "disk-activity";
90 default-state = "off";
91 };
92 };
93
94 gpio_fan: gpio_fan {
95 /* Based on 5v 500mA AFB02505HHB */
96 compatible = "gpio-fan";
97 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
98 gpio-fan,speed-map = <0 0>,
99 <13000 1>;
100 #cooling-cells = <2>;
101 };
102
103 hdmi0: connector {
104 compatible = "hdmi-connector";
105 label = "hdmi";
106
107 type = "a";
108
109 port {
110 hdmi_connector_in: endpoint {
111 remote-endpoint = <&tpd12s015_out>;
112 };
113 };
114 };
115
116 tpd12s015: encoder {
117 compatible = "ti,tpd12s015";
118
119 pinctrl-names = "default";
120 pinctrl-0 = <&tpd12s015_pins>;
121
122 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
123 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
124 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
125
126 ports {
127 #address-cells = <1>;
128 #size-cells = <0>;
129
130 port@0 {
131 reg = <0>;
132
133 tpd12s015_in: endpoint {
134 remote-endpoint = <&hdmi_out>;
135 };
136 };
137
138 port@1 {
139 reg = <1>;
140
141 tpd12s015_out: endpoint {
142 remote-endpoint = <&hdmi_connector_in>;
143 };
144 };
145 };
146 };
147
148 sound0: sound0 {
149 compatible = "simple-audio-card";
150 simple-audio-card,name = "BeagleBoard-X15";
151 simple-audio-card,widgets =
152 "Line", "Line Out",
153 "Line", "Line In";
154 simple-audio-card,routing =
155 "Line Out", "LLOUT",
156 "Line Out", "RLOUT",
157 "MIC2L", "Line In",
158 "MIC2R", "Line In";
159 simple-audio-card,format = "dsp_b";
160 simple-audio-card,bitclock-master = <&sound0_master>;
161 simple-audio-card,frame-master = <&sound0_master>;
162 simple-audio-card,bitclock-inversion;
163
164 simple-audio-card,cpu {
165 sound-dai = <&mcasp3>;
166 };
167
168 sound0_master: simple-audio-card,codec {
169 sound-dai = <&tlv320aic3104>;
170 clocks = <&clkout2_clk>;
171 };
172 };
173}; 14};
174 15
175&dra7_pmx_core { 16&tpd12s015 {
176 leds_pins_default: leds_pins_default { 17 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
177 pinctrl-single,pins = < 18 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
178 DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */ 19 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
179 DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
180 DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
181 DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
182 >;
183 };
184
185 i2c1_pins_default: i2c1_pins_default {
186 pinctrl-single,pins = <
187 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
188 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
189 >;
190 };
191
192 hdmi_pins: pinmux_hdmi_pins {
193 pinctrl-single,pins = <
194 DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
195 DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
196 >;
197 };
198
199 i2c3_pins_default: i2c3_pins_default {
200 pinctrl-single,pins = <
201 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
202 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
203 >;
204 };
205
206 uart3_pins_default: uart3_pins_default {
207 pinctrl-single,pins = <
208 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
209 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
210 >;
211 };
212
213 mmc1_pins_default: mmc1_pins_default {
214 pinctrl-single,pins = <
215 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
216 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
217 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
218 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
219 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
220 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
221 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
222 >;
223 };
224
225 mmc2_pins_default: mmc2_pins_default {
226 pinctrl-single,pins = <
227 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
228 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
229 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
230 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
231 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
232 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
233 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
234 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
235 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
236 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
237 >;
238 };
239
240 cpsw_pins_default: cpsw_pins_default {
241 pinctrl-single,pins = <
242 /* Slave 1 */
243 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
244 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
245 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
246 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
247 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
248 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
249 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
250 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
251 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
252 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
253 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
254 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
255
256 /* Slave 2 */
257 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
258 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
259 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
260 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
261 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
262 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
263 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
264 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
265 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
266 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
267 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
268 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
269 >;
270
271 };
272
273 cpsw_pins_sleep: cpsw_pins_sleep {
274 pinctrl-single,pins = <
275 /* Slave 1 */
276 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
277 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
278 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
279 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
280 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
281 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
282 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
283 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
284 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
285 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
286 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
287 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
288
289 /* Slave 2 */
290 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
291 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
292 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
293 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
294 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
295 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
296 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
297 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
298 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
299 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
300 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
301 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
302 >;
303 };
304
305 davinci_mdio_pins_default: davinci_mdio_pins_default {
306 pinctrl-single,pins = <
307 /* MDIO */
308 DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
309 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
310 >;
311 };
312
313 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
314 pinctrl-single,pins = <
315 DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
316 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
317 >;
318 };
319
320 tps659038_pins_default: tps659038_pins_default {
321 pinctrl-single,pins = <
322 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
323 >;
324 };
325
326 tmp102_pins_default: tmp102_pins_default {
327 pinctrl-single,pins = <
328 DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
329 >;
330 };
331
332 mcp79410_pins_default: mcp79410_pins_default {
333 pinctrl-single,pins = <
334 DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
335 >;
336 };
337
338 usb1_pins: pinmux_usb1_pins {
339 pinctrl-single,pins = <
340 DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
341 >;
342 };
343
344 tpd12s015_pins: pinmux_tpd12s015_pins {
345 pinctrl-single,pins = <
346 DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
347 DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
348 DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
349 >;
350 };
351
352 clkout2_pins_default: clkout2_pins_default {
353 pinctrl-single,pins = <
354 DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
355 >;
356 };
357
358 clkout2_pins_sleep: clkout2_pins_sleep {
359 pinctrl-single,pins = <
360 DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
361 >;
362 };
363
364 mcasp3_pins_default: mcasp3_pins_default {
365 pinctrl-single,pins = <
366 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
367 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
368 DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
369 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
370 >;
371 };
372
373 mcasp3_pins_sleep: mcasp3_pins_sleep {
374 pinctrl-single,pins = <
375 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
376 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
377 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
378 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
379 >;
380 };
381};
382
383&i2c1 {
384 status = "okay";
385 pinctrl-names = "default";
386 pinctrl-0 = <&i2c1_pins_default>;
387 clock-frequency = <400000>;
388
389 tps659038: tps659038@58 {
390 compatible = "ti,tps659038";
391 reg = <0x58>;
392 interrupt-parent = <&gpio1>;
393 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
394
395 pinctrl-names = "default";
396 pinctrl-0 = <&tps659038_pins_default>;
397
398 #interrupt-cells = <2>;
399 interrupt-controller;
400
401 ti,system-power-controller;
402
403 tps659038_pmic {
404 compatible = "ti,tps659038-pmic";
405
406 regulators {
407 smps12_reg: smps12 {
408 /* VDD_MPU */
409 regulator-name = "smps12";
410 regulator-min-microvolt = < 850000>;
411 regulator-max-microvolt = <1250000>;
412 regulator-always-on;
413 regulator-boot-on;
414 };
415
416 smps3_reg: smps3 {
417 /* VDD_DDR */
418 regulator-name = "smps3";
419 regulator-min-microvolt = <1350000>;
420 regulator-max-microvolt = <1350000>;
421 regulator-always-on;
422 regulator-boot-on;
423 };
424
425 smps45_reg: smps45 {
426 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
427 regulator-name = "smps45";
428 regulator-min-microvolt = < 850000>;
429 regulator-max-microvolt = <1250000>;
430 regulator-always-on;
431 regulator-boot-on;
432 };
433
434 smps6_reg: smps6 {
435 /* VDD_CORE */
436 regulator-name = "smps6";
437 regulator-min-microvolt = <850000>;
438 regulator-max-microvolt = <1150000>;
439 regulator-always-on;
440 regulator-boot-on;
441 };
442
443 /* SMPS7 unused */
444
445 smps8_reg: smps8 {
446 /* VDD_1V8 */
447 regulator-name = "smps8";
448 regulator-min-microvolt = <1800000>;
449 regulator-max-microvolt = <1800000>;
450 regulator-always-on;
451 regulator-boot-on;
452 };
453
454 /* SMPS9 unused */
455
456 ldo1_reg: ldo1 {
457 /* VDD_SD / VDDSHV8 */
458 regulator-name = "ldo1";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <3300000>;
461 regulator-boot-on;
462 regulator-always-on;
463 };
464
465 ldo2_reg: ldo2 {
466 /* VDD_SHV5 */
467 regulator-name = "ldo2";
468 regulator-min-microvolt = <3300000>;
469 regulator-max-microvolt = <3300000>;
470 regulator-always-on;
471 regulator-boot-on;
472 };
473
474 ldo3_reg: ldo3 {
475 /* VDDA_1V8_PHYA */
476 regulator-name = "ldo3";
477 regulator-min-microvolt = <1800000>;
478 regulator-max-microvolt = <1800000>;
479 regulator-always-on;
480 regulator-boot-on;
481 };
482
483 ldo4_reg: ldo4 {
484 /* VDDA_1V8_PHYB */
485 regulator-name = "ldo4";
486 regulator-min-microvolt = <1800000>;
487 regulator-max-microvolt = <1800000>;
488 regulator-always-on;
489 regulator-boot-on;
490 };
491
492 ldo9_reg: ldo9 {
493 /* VDD_RTC */
494 regulator-name = "ldo9";
495 regulator-min-microvolt = <1050000>;
496 regulator-max-microvolt = <1050000>;
497 regulator-always-on;
498 regulator-boot-on;
499 };
500
501 ldoln_reg: ldoln {
502 /* VDDA_1V8_PLL */
503 regulator-name = "ldoln";
504 regulator-min-microvolt = <1800000>;
505 regulator-max-microvolt = <1800000>;
506 regulator-always-on;
507 regulator-boot-on;
508 };
509
510 ldousb_reg: ldousb {
511 /* VDDA_3V_USB: VDDA_USBHS33 */
512 regulator-name = "ldousb";
513 regulator-min-microvolt = <3300000>;
514 regulator-max-microvolt = <3300000>;
515 regulator-boot-on;
516 };
517
518 regen1: regen1 {
519 /* VDD_3V3_ON */
520 regulator-name = "regen1";
521 regulator-boot-on;
522 regulator-always-on;
523 };
524 };
525 };
526
527 tps659038_rtc: tps659038_rtc {
528 compatible = "ti,palmas-rtc";
529 interrupt-parent = <&tps659038>;
530 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
531 wakeup-source;
532 };
533
534 tps659038_pwr_button: tps659038_pwr_button {
535 compatible = "ti,palmas-pwrbutton";
536 interrupt-parent = <&tps659038>;
537 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
538 wakeup-source;
539 ti,palmas-long-press-seconds = <12>;
540 };
541
542 tps659038_gpio: tps659038_gpio {
543 compatible = "ti,palmas-gpio";
544 gpio-controller;
545 #gpio-cells = <2>;
546 };
547
548 extcon_usb2: tps659038_usb {
549 compatible = "ti,palmas-usb-vid";
550 ti,enable-vbus-detection;
551 vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
552 };
553
554 };
555
556 tmp102: tmp102@48 {
557 compatible = "ti,tmp102";
558 reg = <0x48>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&tmp102_pins_default>;
561 interrupt-parent = <&gpio7>;
562 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
563 #thermal-sensor-cells = <1>;
564 };
565
566 tlv320aic3104: tlv320aic3104@18 {
567 #sound-dai-cells = <0>;
568 compatible = "ti,tlv320aic3104";
569 reg = <0x18>;
570 pinctrl-names = "default", "sleep";
571 pinctrl-0 = <&clkout2_pins_default>;
572 pinctrl-1 = <&clkout2_pins_sleep>;
573 assigned-clocks = <&clkoutmux2_clk_mux>;
574 assigned-clock-parents = <&sys_clk2_dclk_div>;
575
576 status = "okay";
577 adc-settle-ms = <40>;
578
579 AVDD-supply = <&vdd_3v3>;
580 IOVDD-supply = <&vdd_3v3>;
581 DRVDD-supply = <&vdd_3v3>;
582 DVDD-supply = <&aic_dvdd>;
583 };
584
585 eeprom: eeprom@50 {
586 compatible = "at,24c32";
587 reg = <0x50>;
588 };
589};
590
591&i2c3 {
592 status = "okay";
593 pinctrl-names = "default";
594 pinctrl-0 = <&i2c3_pins_default>;
595 clock-frequency = <400000>;
596
597 mcp_rtc: rtc@6f {
598 compatible = "microchip,mcp7941x";
599 reg = <0x6f>;
600 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
601 <&dra7_pmx_core 0x424>;
602 interrupt-names = "irq", "wakeup";
603
604 pinctrl-names = "default";
605 pinctrl-0 = <&mcp79410_pins_default>;
606
607 vcc-supply = <&vdd_3v3>;
608 wakeup-source;
609 };
610};
611
612&gpio7 {
613 ti,no-reset-on-init;
614 ti,no-idle-on-init;
615};
616
617&cpu0 {
618 cpu0-supply = <&smps12_reg>;
619 voltage-tolerance = <1>;
620};
621
622&uart3 {
623 status = "okay";
624 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
625 <&dra7_pmx_core 0x3f8>;
626
627 pinctrl-names = "default";
628 pinctrl-0 = <&uart3_pins_default>;
629};
630
631&mac {
632 status = "okay";
633 pinctrl-names = "default", "sleep";
634 pinctrl-0 = <&cpsw_pins_default>;
635 pinctrl-1 = <&cpsw_pins_sleep>;
636 dual_emac;
637};
638
639&cpsw_emac0 {
640 phy_id = <&davinci_mdio>, <1>;
641 phy-mode = "rgmii";
642 dual_emac_res_vlan = <1>;
643};
644
645&cpsw_emac1 {
646 phy_id = <&davinci_mdio>, <2>;
647 phy-mode = "rgmii";
648 dual_emac_res_vlan = <2>;
649};
650
651&davinci_mdio {
652 pinctrl-names = "default", "sleep";
653 pinctrl-0 = <&davinci_mdio_pins_default>;
654 pinctrl-1 = <&davinci_mdio_pins_sleep>;
655}; 20};
656 21
657&mmc1 { 22&mmc1 {
658 status = "okay";
659
660 pinctrl-names = "default";
661 pinctrl-0 = <&mmc1_pins_default>;
662
663 vmmc-supply = <&ldo1_reg>; 23 vmmc-supply = <&ldo1_reg>;
664 bus-width = <4>;
665 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
666};
667
668&mmc2 {
669 status = "okay";
670
671 pinctrl-names = "default";
672 pinctrl-0 = <&mmc2_pins_default>;
673
674 vmmc-supply = <&vdd_3v3>;
675 bus-width = <8>;
676 ti,non-removable;
677 cap-mmc-dual-data-rate;
678};
679
680&sata {
681 status = "okay";
682};
683
684&usb2_phy1 {
685 phy-supply = <&ldousb_reg>;
686};
687
688&usb2_phy2 {
689 phy-supply = <&ldousb_reg>;
690};
691
692&usb1 {
693 dr_mode = "host";
694 pinctrl-names = "default";
695 pinctrl-0 = <&usb1_pins>;
696};
697
698&omap_dwc3_2 {
699 extcon = <&extcon_usb2>;
700};
701
702&usb2 {
703 /*
704 * Stand alone usage is peripheral only.
705 * However, with some resistor modifications
706 * this port can be used via expansion connectors
707 * as "host" or "dual-role". If so, provide
708 * the necessary dr_mode override in the expansion
709 * board's DT.
710 */
711 dr_mode = "peripheral";
712};
713
714&cpu_trips {
715 cpu_alert1: cpu_alert1 {
716 temperature = <50000>; /* millicelsius */
717 hysteresis = <2000>; /* millicelsius */
718 type = "active";
719 };
720};
721
722&cpu_cooling_maps {
723 map1 {
724 trip = <&cpu_alert1>;
725 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
726 };
727};
728
729&thermal_zones {
730 board_thermal: board_thermal {
731 polling-delay-passive = <1250>; /* milliseconds */
732 polling-delay = <1500>; /* milliseconds */
733
734 /* sensor ID */
735 thermal-sensors = <&tmp102 0>;
736
737 board_trips: trips {
738 board_alert0: board_alert {
739 temperature = <40000>; /* millicelsius */
740 hysteresis = <2000>; /* millicelsius */
741 type = "active";
742 };
743
744 board_crit: board_crit {
745 temperature = <105000>; /* millicelsius */
746 hysteresis = <0>; /* millicelsius */
747 type = "critical";
748 };
749 };
750
751 board_cooling_maps: cooling-maps {
752 map0 {
753 trip = <&board_alert0>;
754 cooling-device =
755 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
756 };
757 };
758 };
759};
760
761&dss {
762 status = "ok";
763
764 vdda_video-supply = <&ldoln_reg>;
765};
766
767&hdmi {
768 status = "ok";
769 vdda-supply = <&ldo4_reg>;
770
771 pinctrl-names = "default";
772 pinctrl-0 = <&hdmi_pins>;
773
774 port {
775 hdmi_out: endpoint {
776 remote-endpoint = <&tpd12s015_in>;
777 };
778 };
779};
780
781&pcie1 {
782 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
783};
784
785&mcasp3 {
786 #sound-dai-cells = <0>;
787 pinctrl-names = "default", "sleep";
788 pinctrl-0 = <&mcasp3_pins_default>;
789 pinctrl-1 = <&mcasp3_pins_sleep>;
790 assigned-clocks = <&mcasp3_ahclkx_mux>;
791 assigned-clock-parents = <&sys_clkin2>;
792 status = "okay";
793
794 op-mode = <0>; /* MCASP_IIS_MODE */
795 tdm-slots = <2>;
796 /* 4 serializers */
797 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
798 1 2 0 0
799 >;
800 tx-num-evt = <32>;
801 rx-num-evt = <32>;
802};
803
804&mailbox5 {
805 status = "okay";
806 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
807 status = "okay";
808 };
809 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
810 status = "okay";
811 };
812};
813
814&mailbox6 {
815 status = "okay";
816 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
817 status = "okay";
818 };
819 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
820 status = "okay";
821 };
822}; 24};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 147df90d2126..d4fcd68f6349 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -80,9 +80,11 @@
80 compatible = "arm,cortex-a15"; 80 compatible = "arm,cortex-a15";
81 reg = <0>; 81 reg = <0>;
82 82
83 operating-points-v2 = <&cpu0_opp_table>; 83 operating-points = <
84 ti,syscon-efuse = <&scm_wkup 0x20c 0xf80000 19>; 84 /* kHz uV */
85 ti,syscon-rev = <&scm_wkup 0x204>; 85 1000000 1060000
86 1176000 1160000
87 >;
86 88
87 clocks = <&dpll_mpu_ck>; 89 clocks = <&dpll_mpu_ck>;
88 clock-names = "cpu"; 90 clock-names = "cpu";
@@ -96,24 +98,6 @@
96 }; 98 };
97 }; 99 };
98 100
99 cpu0_opp_table: opp_table0 {
100 compatible = "operating-points-v2";
101 opp-shared;
102
103 opp_nom@1000000000 {
104 opp-hz = /bits/ 64 <1000000000>;
105 opp-microvolt = <1060000 850000 1150000>;
106 opp-supported-hw = <0xFF 0x01>;
107 opp-suspend;
108 };
109
110 opp_od@1176000000 {
111 opp-hz = /bits/ 64 <1176000000>;
112 opp-microvolt = <1160000 885000 1160000>;
113 opp-supported-hw = <0xFF 0x02>;
114 };
115 };
116
117 /* 101 /*
118 * The soc node represents the soc top level view. It is used for IPs 102 * The soc node represents the soc top level view. It is used for IPs
119 * that are not memory mapped in the MPU view or for the MPU itself. 103 * that are not memory mapped in the MPU view or for the MPU itself.
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 8987b3e180a1..0a78347e6615 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -17,7 +17,6 @@
17 device_type = "cpu"; 17 device_type = "cpu";
18 compatible = "arm,cortex-a15"; 18 compatible = "arm,cortex-a15";
19 reg = <1>; 19 reg = <1>;
20 operating-points-v2 = <&cpu0_opp_table>;
21 }; 20 };
22 }; 21 };
23 22
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index 5563e2533ebd..b3a8b1f24499 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -102,7 +102,7 @@
102 102
103 backlight { 103 backlight {
104 compatible = "pwm-backlight"; 104 compatible = "pwm-backlight";
105 pwms = <&pwm11 0 2000000 0>; 105 pwms = <&pwm11 0 12000000 0>;
106 pwm-names = "backlight"; 106 pwm-names = "backlight";
107 brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>; 107 brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>;
108 default-brightness-level = <9>; /* => 90 */ 108 default-brightness-level = <9>; /* => 90 */
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index d48e45bd4b3d..1673689e6705 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -446,6 +446,8 @@
446 pinctrl-names = "default"; 446 pinctrl-names = "default";
447 pinctrl-0 = <&wl12xx_pins>; 447 pinctrl-0 = <&wl12xx_pins>;
448 vmmc-supply = <&wl12xx_vmmc>; 448 vmmc-supply = <&wl12xx_vmmc>;
449 interrupts-extended = <&wakeupgen GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH
450 &omap4_pmx_core 0x10e>;
449 non-removable; 451 non-removable;
450 bus-width = <4>; 452 bus-width = <4>;
451 cap-power-off-card; 453 cap-power-off-card;
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index d1f5ce3d3651..6365635fea5c 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -77,16 +77,6 @@
77 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */ 77 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
78 }; 78 };
79 79
80 leds {
81 compatible = "gpio-leds";
82 led1 {
83 label = "omap5:blue:usr1";
84 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
85 linux,default-trigger = "heartbeat";
86 default-state = "off";
87 };
88 };
89
90 tpd12s015: encoder { 80 tpd12s015: encoder {
91 compatible = "ti,tpd12s015"; 81 compatible = "ti,tpd12s015";
92 82
@@ -332,7 +322,7 @@
332 322
333 wlcore_irq_pin: pinmux_wlcore_irq_pin { 323 wlcore_irq_pin: pinmux_wlcore_irq_pin {
334 pinctrl-single,pins = < 324 pinctrl-single,pins = <
335 OMAP5_IOPAD(0x40, PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */ 325 OMAP5_IOPAD(0x40, PIN_INPUT | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
336 >; 326 >;
337 }; 327 };
338}; 328};
@@ -355,15 +345,17 @@
355 non-removable; 345 non-removable;
356 cap-power-off-card; 346 cap-power-off-card;
357 pinctrl-names = "default"; 347 pinctrl-names = "default";
358 pinctrl-0 = <&mmc3_pins &wlcore_irq_pin>; 348 pinctrl-0 = <&mmc3_pins>;
359 interrupts-extended = <&gic GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 349 interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
360 &omap5_pmx_core 0x168>; 350 &omap5_pmx_core 0x16a>;
361 351
362 #address-cells = <1>; 352 #address-cells = <1>;
363 #size-cells = <0>; 353 #size-cells = <0>;
364 wlcore: wlcore@2 { 354 wlcore: wlcore@2 {
365 compatible = "ti,wl1271"; 355 compatible = "ti,wl1271";
366 reg = <2>; 356 reg = <2>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&wlcore_irq_pin>;
367 interrupt-parent = <&gpio1>; 359 interrupt-parent = <&gpio1>;
368 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */ 360 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */
369 ref-clock-frequency = <26000000>; 361 ref-clock-frequency = <26000000>;
@@ -391,14 +383,23 @@
391 interrupt-controller; 383 interrupt-controller;
392 #interrupt-cells = <2>; 384 #interrupt-cells = <2>;
393 ti,system-power-controller; 385 ti,system-power-controller;
386 ti,mux-pad1 = <0xa1>;
387 ti,mux-pad2 = <0x1b>;
394 pinctrl-names = "default"; 388 pinctrl-names = "default";
395 pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>; 389 pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
396 390
391 palmas_gpio: gpio {
392 compatible = "ti,palmas-gpio";
393 gpio-controller;
394 #gpio-cells = <2>;
395 };
396
397 extcon_usb3: palmas_usb { 397 extcon_usb3: palmas_usb {
398 compatible = "ti,palmas-usb-vid"; 398 compatible = "ti,palmas-usb-vid";
399 ti,enable-vbus-detection; 399 ti,enable-vbus-detection;
400 ti,enable-id-detection; 400 ti,enable-id-detection;
401 ti,wakeup; 401 ti,wakeup;
402 id-gpios = <&palmas_gpio 0 GPIO_ACTIVE_HIGH>;
402 }; 403 };
403 404
404 clk32kgaudio: palmas_clk32k@1 { 405 clk32kgaudio: palmas_clk32k@1 {
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts
index c9390fa9c362..b153f604932a 100644
--- a/arch/arm/boot/dts/omap5-cm-t54.dts
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -13,7 +13,7 @@
13 13
14 memory@80000000 { 14 memory@80000000 {
15 device_type = "memory"; 15 device_type = "memory";
16 reg = <0x80000000 0x7F000000>; /* 2048 MB */ 16 reg = <0 0x80000000 0 0x7f000000>; /* 2048 MB */
17 }; 17 };
18 18
19 aliases { 19 aliases {
diff --git a/arch/arm/boot/dts/omap5-igep0050.dts b/arch/arm/boot/dts/omap5-igep0050.dts
index 7aa2b0c813ab..44e03b9be1f1 100644
--- a/arch/arm/boot/dts/omap5-igep0050.dts
+++ b/arch/arm/boot/dts/omap5-igep0050.dts
@@ -7,6 +7,7 @@
7 */ 7 */
8/dts-v1/; 8/dts-v1/;
9 9
10#include <dt-bindings/input/input.h>
10#include "omap5-board-common.dtsi" 11#include "omap5-board-common.dtsi"
11 12
12/ { 13/ {
@@ -15,7 +16,38 @@
15 16
16 memory@80000000 { 17 memory@80000000 {
17 device_type = "memory"; 18 device_type = "memory";
18 reg = <0x80000000 0x7f000000>; /* 2032 MB */ 19 reg = <0x0 0x80000000 0 0x7f000000>; /* 2032 MB */
20 };
21
22 gpio_keys {
23 compatible = "gpio-keys";
24 pinctrl-0 = <&power_button_pin>;
25 pinctrl-names = "default";
26
27 power-button {
28 label = "Power Button";
29 linux,code = <KEY_POWER>;
30 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
31 };
32 };
33
34 leds {
35 compatible = "gpio-leds";
36 led@1 {
37 label = "board:green:usr0";
38 gpios = <&tca6416 1 0>;
39 default-state = "off";
40 };
41 led@2 {
42 label = "board:red:usr1";
43 gpios = <&tca6416 2 0>;
44 default-state = "off";
45 };
46 led@3 {
47 label = "board:blue:usr1";
48 gpios = <&tca6416 3 0>;
49 default-state = "off";
50 };
19 }; 51 };
20}; 52};
21 53
@@ -58,6 +90,12 @@
58 OMAP5_IOPAD(0x0fa, PIN_INPUT | MUX_MODE0) /* i2c4_sda */ 90 OMAP5_IOPAD(0x0fa, PIN_INPUT | MUX_MODE0) /* i2c4_sda */
59 >; 91 >;
60 }; 92 };
93
94 power_button_pin: pinctrl_power_button_pin {
95 pinctrl-single,pins = <
96 OMAP5_IOPAD(0x086, PIN_INPUT | MUX_MODE6) /* gpio4_118 */
97 >;
98 };
61}; 99};
62 100
63&tpd12s015 { 101&tpd12s015 {
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 5230ca00913a..53d31a87b44b 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -15,7 +15,17 @@
15 15
16 memory@80000000 { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x7F000000>; /* 2032 MB */ 18 reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */
19 };
20
21 leds {
22 compatible = "gpio-leds";
23 led1 {
24 label = "omap5:blue:usr1";
25 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
26 linux,default-trigger = "heartbeat";
27 default-state = "off";
28 };
19 }; 29 };
20}; 30};
21 31
@@ -61,3 +71,7 @@
61 OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ 71 OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
62 >; 72 >;
63}; 73};
74
75&wlcore {
76 compatible = "ti,wl1837";
77};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 71a8f5492c8b..25262118ec3d 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -12,8 +12,8 @@
12#include <dt-bindings/pinctrl/omap.h> 12#include <dt-bindings/pinctrl/omap.h>
13 13
14/ { 14/ {
15 #address-cells = <1>; 15 #address-cells = <2>;
16 #size-cells = <1>; 16 #size-cells = <2>;
17 17
18 compatible = "ti,omap5"; 18 compatible = "ti,omap5";
19 interrupt-parent = <&wakeupgen>; 19 interrupt-parent = <&wakeupgen>;
@@ -90,10 +90,10 @@
90 compatible = "arm,cortex-a15-gic"; 90 compatible = "arm,cortex-a15-gic";
91 interrupt-controller; 91 interrupt-controller;
92 #interrupt-cells = <3>; 92 #interrupt-cells = <3>;
93 reg = <0x48211000 0x1000>, 93 reg = <0 0x48211000 0 0x1000>,
94 <0x48212000 0x1000>, 94 <0 0x48212000 0 0x1000>,
95 <0x48214000 0x2000>, 95 <0 0x48214000 0 0x2000>,
96 <0x48216000 0x2000>; 96 <0 0x48216000 0 0x2000>;
97 interrupt-parent = <&gic>; 97 interrupt-parent = <&gic>;
98 }; 98 };
99 99
@@ -101,7 +101,7 @@
101 compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu"; 101 compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
102 interrupt-controller; 102 interrupt-controller;
103 #interrupt-cells = <3>; 103 #interrupt-cells = <3>;
104 reg = <0x48281000 0x1000>; 104 reg = <0 0x48281000 0 0x1000>;
105 interrupt-parent = <&gic>; 105 interrupt-parent = <&gic>;
106 }; 106 };
107 107
@@ -129,11 +129,11 @@
129 compatible = "ti,omap5-l3-noc", "simple-bus"; 129 compatible = "ti,omap5-l3-noc", "simple-bus";
130 #address-cells = <1>; 130 #address-cells = <1>;
131 #size-cells = <1>; 131 #size-cells = <1>;
132 ranges; 132 ranges = <0 0 0 0xc0000000>;
133 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; 133 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
134 reg = <0x44000000 0x2000>, 134 reg = <0 0x44000000 0 0x2000>,
135 <0x44800000 0x3000>, 135 <0 0x44800000 0 0x3000>,
136 <0x45000000 0x4000>; 136 <0 0x45000000 0 0x4000>;
137 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 137 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
138 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 138 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
139 139
@@ -863,7 +863,7 @@
863 #size-cells = <1>; 863 #size-cells = <1>;
864 utmi-mode = <2>; 864 utmi-mode = <2>;
865 ranges; 865 ranges;
866 dwc3@4a030000 { 866 dwc3: dwc3@4a030000 {
867 compatible = "snps,dwc3"; 867 compatible = "snps,dwc3";
868 reg = <0x4a030000 0x10000>; 868 reg = <0x4a030000 0x10000>;
869 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 869 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-31 17:43:49 -0400