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authorArnd Bergmann <arnd@arndb.de>2016-09-19 11:38:38 -0400
committerArnd Bergmann <arnd@arndb.de>2016-09-19 11:38:38 -0400
commit590b9066185aebfd280bb94b033cf1ed44ac467e (patch)
treeaea8e4bf93ca007c6e8dbbbc549c5e8dddb134f2 /arch/arm/boot
parent3179798debad2a7ba82e96c24712d04a1aee4c9f (diff)
parent9304af1b9ffa95dcb37d642852f8c67b98ea349a (diff)
Merge tag 'davinci-for-v4.9/dts-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DTS updates for v4.9 (part 2)" from Sekhar Nori: This pull request adds NAND support to DA850 based LCDK board. * tag 'davinci-for-v4.9/dts-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: dts: da850-lcdk: Add NAND to DT
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/da850-lcdk.dts83
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 7563260e95d1..7b8ab21fed6c 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -63,6 +63,27 @@
63 0x04 0x00000110 0x00000ff0 63 0x04 0x00000110 0x00000ff0
64 >; 64 >;
65 }; 65 };
66
67 nand_pins: nand_pins {
68 pinctrl-single,bits = <
69 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
70 0x1c 0x10110010 0xf0ff00f0
71 /*
72 * EMA_D[0], EMA_D[1], EMA_D[2],
73 * EMA_D[3], EMA_D[4], EMA_D[5],
74 * EMA_D[6], EMA_D[7]
75 */
76 0x24 0x11111111 0xffffffff
77 /*
78 * EMA_D[8], EMA_D[9], EMA_D[10],
79 * EMA_D[11], EMA_D[12], EMA_D[13],
80 * EMA_D[14], EMA_D[15]
81 */
82 0x20 0x11111111 0xffffffff
83 /* EMA_A[1], EMA_A[2] */
84 0x30 0x01100000 0x0ff00000
85 >;
86 };
66}; 87};
67 88
68&serial2 { 89&serial2 {
@@ -136,3 +157,65 @@
136 tx-num-evt = <32>; 157 tx-num-evt = <32>;
137 rx-num-evt = <32>; 158 rx-num-evt = <32>;
138}; 159};
160
161&aemif {
162 pinctrl-names = "default";
163 pinctrl-0 = <&nand_pins>;
164 status = "okay";
165 cs3 {
166 #address-cells = <2>;
167 #size-cells = <1>;
168 clock-ranges;
169 ranges;
170
171 ti,cs-chipselect = <3>;
172
173 nand@2000000,0 {
174 compatible = "ti,davinci-nand";
175 #address-cells = <1>;
176 #size-cells = <1>;
177 reg = <0 0x02000000 0x02000000
178 1 0x00000000 0x00008000>;
179
180 ti,davinci-chipselect = <1>;
181 ti,davinci-mask-ale = <0>;
182 ti,davinci-mask-cle = <0>;
183 ti,davinci-mask-chipsel = <0>;
184
185 ti,davinci-nand-buswidth = <16>;
186 ti,davinci-ecc-mode = "hw";
187 ti,davinci-ecc-bits = <4>;
188 ti,davinci-nand-use-bbt;
189
190 /*
191 * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
192 * "To boot from NAND Flash, the AIS should be written
193 * to NAND block 1 (NAND block 0 is not used by default)".
194 * The same doc mentions that for ROM "Silicon Revision 2.1",
195 * "Updated NAND boot mode to offer boot from block 0 or block 1".
196 * However the limitaion is left here by default for compatibility
197 * with older silicon and because it needs new boot pin settings
198 * not possible in stock LCDK.
199 */
200 partitions {
201 compatible = "fixed-partitions";
202 #address-cells = <1>;
203 #size-cells = <1>;
204
205 partition@0 {
206 label = "u-boot env";
207 reg = <0 0x020000>;
208 };
209 partition@0x020000 {
210 /* The LCDK defaults to booting from this partition */
211 label = "u-boot";
212 reg = <0x020000 0x080000>;
213 };
214 partition@0x0a0000 {
215 label = "free space";
216 reg = <0x0a0000 0>;
217 };
218 };
219 };
220 };
221};