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authorEric Huang <JinHuiEric.Huang@amd.com>2016-05-19 15:46:10 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-07-07 14:50:48 -0400
commit8b2e574dc4bf18e86bc09bd15215a2d62a3008ee (patch)
treec4b49f43221b0086f62984bd97cdbc51a6979bd0
parentc85e299ff9a14fe43160fd8caada383d622354a1 (diff)
drm/amdgpu: add the new common pm code to support sclk OD
This extends OD (OverDrive) support to the non-Powerplay code paths. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c24
2 files changed, 17 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 5252580621bc..aeec288b572a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1562,6 +1562,8 @@ struct amdgpu_dpm_funcs {
1562 int (*get_fan_speed_percent)(struct amdgpu_device *adev, u32 *speed); 1562 int (*get_fan_speed_percent)(struct amdgpu_device *adev, u32 *speed);
1563 int (*force_clock_level)(struct amdgpu_device *adev, enum pp_clock_type type, uint32_t mask); 1563 int (*force_clock_level)(struct amdgpu_device *adev, enum pp_clock_type type, uint32_t mask);
1564 int (*print_clock_levels)(struct amdgpu_device *adev, enum pp_clock_type type, char *buf); 1564 int (*print_clock_levels)(struct amdgpu_device *adev, enum pp_clock_type type, char *buf);
1565 int (*get_sclk_od)(struct amdgpu_device *adev);
1566 int (*set_sclk_od)(struct amdgpu_device *adev, uint32_t value);
1565}; 1567};
1566 1568
1567struct amdgpu_dpm { 1569struct amdgpu_dpm {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 5ad2e7926328..d6484d6e60dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -491,6 +491,8 @@ static ssize_t amdgpu_get_pp_sclk_od(struct device *dev,
491 491
492 if (adev->pp_enabled) 492 if (adev->pp_enabled)
493 value = amdgpu_dpm_get_sclk_od(adev); 493 value = amdgpu_dpm_get_sclk_od(adev);
494 else if (adev->pm.funcs->get_sclk_od)
495 value = adev->pm.funcs->get_sclk_od(adev);
494 496
495 return snprintf(buf, PAGE_SIZE, "%d\n", value); 497 return snprintf(buf, PAGE_SIZE, "%d\n", value);
496} 498}
@@ -512,10 +514,14 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,
512 goto fail; 514 goto fail;
513 } 515 }
514 516
515 if (adev->pp_enabled) 517 if (adev->pp_enabled) {
516 amdgpu_dpm_set_sclk_od(adev, (uint32_t)value); 518 amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
517 519 amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_READJUST_POWER_STATE, NULL, NULL);
518 amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_READJUST_POWER_STATE, NULL, NULL); 520 } else if (adev->pm.funcs->set_sclk_od) {
521 adev->pm.funcs->set_sclk_od(adev, (uint32_t)value);
522 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
523 amdgpu_pm_compute_clocks(adev);
524 }
519 525
520fail: 526fail:
521 return count; 527 return count;
@@ -1163,11 +1169,6 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
1163 DRM_ERROR("failed to create device file pp_table\n"); 1169 DRM_ERROR("failed to create device file pp_table\n");
1164 return ret; 1170 return ret;
1165 } 1171 }
1166 ret = device_create_file(adev->dev, &dev_attr_pp_sclk_od);
1167 if (ret) {
1168 DRM_ERROR("failed to create device file pp_sclk_od\n");
1169 return ret;
1170 }
1171 } 1172 }
1172 1173
1173 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk); 1174 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk);
@@ -1185,6 +1186,11 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
1185 DRM_ERROR("failed to create device file pp_dpm_pcie\n"); 1186 DRM_ERROR("failed to create device file pp_dpm_pcie\n");
1186 return ret; 1187 return ret;
1187 } 1188 }
1189 ret = device_create_file(adev->dev, &dev_attr_pp_sclk_od);
1190 if (ret) {
1191 DRM_ERROR("failed to create device file pp_sclk_od\n");
1192 return ret;
1193 }
1188 1194
1189 ret = amdgpu_debugfs_pm_init(adev); 1195 ret = amdgpu_debugfs_pm_init(adev);
1190 if (ret) { 1196 if (ret) {
@@ -1208,11 +1214,11 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
1208 device_remove_file(adev->dev, &dev_attr_pp_cur_state); 1214 device_remove_file(adev->dev, &dev_attr_pp_cur_state);
1209 device_remove_file(adev->dev, &dev_attr_pp_force_state); 1215 device_remove_file(adev->dev, &dev_attr_pp_force_state);
1210 device_remove_file(adev->dev, &dev_attr_pp_table); 1216 device_remove_file(adev->dev, &dev_attr_pp_table);
1211 device_remove_file(adev->dev, &dev_attr_pp_sclk_od);
1212 } 1217 }
1213 device_remove_file(adev->dev, &dev_attr_pp_dpm_sclk); 1218 device_remove_file(adev->dev, &dev_attr_pp_dpm_sclk);
1214 device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk); 1219 device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk);
1215 device_remove_file(adev->dev, &dev_attr_pp_dpm_pcie); 1220 device_remove_file(adev->dev, &dev_attr_pp_dpm_pcie);
1221 device_remove_file(adev->dev, &dev_attr_pp_sclk_od);
1216} 1222}
1217 1223
1218void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) 1224void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)