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authorHongzhou Yang <hongzhou.yang@mediatek.com>2015-01-27 02:13:55 -0500
committerLinus Walleij <linus.walleij@linaro.org>2015-03-17 21:02:16 -0400
commit30f010f5c4cfcdf3773d6f2dcbab3c349d05c668 (patch)
treea7762cb3f96f2fdec463de6a6ee939a9d4a892b8
parentd9819eb9cd3252fe45d52500f0f12980ee040177 (diff)
arm64: mediatek: Add Pinctrl/GPIO/EINT driver for mt8173.
Add mt8173 support using mediatek common pinctrl driver. MT8173 have a different ies_smt setting register than mt8135, so adding this support to common code. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--drivers/pinctrl/mediatek/Kconfig4
-rw-r--r--drivers/pinctrl/mediatek/Makefile1
-rw-r--r--drivers/pinctrl/mediatek/pinctrl-mt8173.c452
-rw-r--r--drivers/pinctrl/mediatek/pinctrl-mtk-common.c14
-rw-r--r--drivers/pinctrl/mediatek/pinctrl-mtk-common.h7
-rw-r--r--drivers/pinctrl/mediatek/pinctrl-mtk-mt8173.h1226
6 files changed, 1704 insertions, 0 deletions
diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
index 70bbf39379ae..49b8649b9ae9 100644
--- a/drivers/pinctrl/mediatek/Kconfig
+++ b/drivers/pinctrl/mediatek/Kconfig
@@ -11,4 +11,8 @@ config PINCTRL_MT8135
11 def_bool MACH_MT8135 11 def_bool MACH_MT8135
12 select PINCTRL_MTK_COMMON 12 select PINCTRL_MTK_COMMON
13 13
14config PINCTRL_MT8173
15 def_bool MACH_MT8173
16 select PINCTRL_MTK_COMMON
17
14endif 18endif
diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile
index 8157dad9d51d..d8606a2179cf 100644
--- a/drivers/pinctrl/mediatek/Makefile
+++ b/drivers/pinctrl/mediatek/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_MTK_COMMON) += pinctrl-mtk-common.o
3 3
4# SoC Drivers 4# SoC Drivers
5obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o 5obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
6obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8173.c b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
new file mode 100644
index 000000000000..66b01bb11778
--- /dev/null
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
@@ -0,0 +1,452 @@
1/*
2 * Copyright (c) 2014-2015 MediaTek Inc.
3 * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/pinctrl/pinctrl.h>
20#include <linux/regmap.h>
21#include <dt-bindings/pinctrl/mt65xx.h>
22
23#include "pinctrl-mtk-common.h"
24#include "pinctrl-mtk-mt8173.h"
25
26#define DRV_BASE 0xb00
27
28/**
29 * struct mtk_pin_ies_smt_set - For special pins' ies and smt setting.
30 * @start: The start pin number of those special pins.
31 * @end: The end pin number of those special pins.
32 * @offset: The offset of special setting register.
33 * @bit: The bit of special setting register.
34 */
35struct mtk_pin_ies_smt_set {
36 unsigned int start;
37 unsigned int end;
38 unsigned int offset;
39 unsigned char bit;
40};
41
42#define MTK_PIN_IES_SMT_SET(_start, _end, _offset, _bit) \
43 { \
44 .start = _start, \
45 .end = _end, \
46 .bit = _bit, \
47 .offset = _offset, \
48 }
49
50/**
51 * struct mtk_pin_spec_pupd_set - For special pins' pull up/down setting.
52 * @pin: The pin number.
53 * @offset: The offset of special pull up/down setting register.
54 * @pupd_bit: The pull up/down bit in this register.
55 * @r0_bit: The r0 bit of pull resistor.
56 * @r1_bit: The r1 bit of pull resistor.
57 */
58struct mtk_pin_spec_pupd_set {
59 unsigned int pin;
60 unsigned int offset;
61 unsigned char pupd_bit;
62 unsigned char r1_bit;
63 unsigned char r0_bit;
64};
65
66#define MTK_PIN_PUPD_SPEC(_pin, _offset, _pupd, _r1, _r0) \
67 { \
68 .pin = _pin, \
69 .offset = _offset, \
70 .pupd_bit = _pupd, \
71 .r1_bit = _r1, \
72 .r0_bit = _r0, \
73 }
74
75static const struct mtk_pin_spec_pupd_set mt8173_spec_pupd[] = {
76 MTK_PIN_PUPD_SPEC(119, 0xe00, 2, 1, 0), /* KROW0 */
77 MTK_PIN_PUPD_SPEC(120, 0xe00, 6, 5, 4), /* KROW1 */
78 MTK_PIN_PUPD_SPEC(121, 0xe00, 10, 9, 8), /* KROW2 */
79 MTK_PIN_PUPD_SPEC(122, 0xe10, 2, 1, 0), /* KCOL0 */
80 MTK_PIN_PUPD_SPEC(123, 0xe10, 6, 5, 4), /* KCOL1 */
81 MTK_PIN_PUPD_SPEC(124, 0xe10, 10, 9, 8), /* KCOL2 */
82
83 MTK_PIN_PUPD_SPEC(67, 0xd10, 2, 1, 0), /* ms0 DS */
84 MTK_PIN_PUPD_SPEC(68, 0xd00, 2, 1, 0), /* ms0 RST */
85 MTK_PIN_PUPD_SPEC(66, 0xc10, 2, 1, 0), /* ms0 cmd */
86 MTK_PIN_PUPD_SPEC(65, 0xc00, 2, 1, 0), /* ms0 clk */
87 MTK_PIN_PUPD_SPEC(57, 0xc20, 2, 1, 0), /* ms0 data0 */
88 MTK_PIN_PUPD_SPEC(58, 0xc20, 2, 1, 0), /* ms0 data1 */
89 MTK_PIN_PUPD_SPEC(59, 0xc20, 2, 1, 0), /* ms0 data2 */
90 MTK_PIN_PUPD_SPEC(60, 0xc20, 2, 1, 0), /* ms0 data3 */
91 MTK_PIN_PUPD_SPEC(61, 0xc20, 2, 1, 0), /* ms0 data4 */
92 MTK_PIN_PUPD_SPEC(62, 0xc20, 2, 1, 0), /* ms0 data5 */
93 MTK_PIN_PUPD_SPEC(63, 0xc20, 2, 1, 0), /* ms0 data6 */
94 MTK_PIN_PUPD_SPEC(64, 0xc20, 2, 1, 0), /* ms0 data7 */
95
96 MTK_PIN_PUPD_SPEC(78, 0xc50, 2, 1, 0), /* ms1 cmd */
97 MTK_PIN_PUPD_SPEC(73, 0xd20, 2, 1, 0), /* ms1 dat0 */
98 MTK_PIN_PUPD_SPEC(74, 0xd20, 6, 5, 4), /* ms1 dat1 */
99 MTK_PIN_PUPD_SPEC(75, 0xd20, 10, 9, 8), /* ms1 dat2 */
100 MTK_PIN_PUPD_SPEC(76, 0xd20, 14, 13, 12), /* ms1 dat3 */
101 MTK_PIN_PUPD_SPEC(77, 0xc40, 2, 1, 0), /* ms1 clk */
102
103 MTK_PIN_PUPD_SPEC(100, 0xd40, 2, 1, 0), /* ms2 dat0 */
104 MTK_PIN_PUPD_SPEC(101, 0xd40, 6, 5, 4), /* ms2 dat1 */
105 MTK_PIN_PUPD_SPEC(102, 0xd40, 10, 9, 8), /* ms2 dat2 */
106 MTK_PIN_PUPD_SPEC(103, 0xd40, 14, 13, 12), /* ms2 dat3 */
107 MTK_PIN_PUPD_SPEC(104, 0xc80, 2, 1, 0), /* ms2 clk */
108 MTK_PIN_PUPD_SPEC(105, 0xc90, 2, 1, 0), /* ms2 cmd */
109
110 MTK_PIN_PUPD_SPEC(22, 0xd60, 2, 1, 0), /* ms3 dat0 */
111 MTK_PIN_PUPD_SPEC(23, 0xd60, 6, 5, 4), /* ms3 dat1 */
112 MTK_PIN_PUPD_SPEC(24, 0xd60, 10, 9, 8), /* ms3 dat2 */
113 MTK_PIN_PUPD_SPEC(25, 0xd60, 14, 13, 12), /* ms3 dat3 */
114 MTK_PIN_PUPD_SPEC(26, 0xcc0, 2, 1, 0), /* ms3 clk */
115 MTK_PIN_PUPD_SPEC(27, 0xcd0, 2, 1, 0) /* ms3 cmd */
116};
117
118static int spec_pull_set(struct regmap *regmap, unsigned int pin,
119 unsigned char align, bool isup, unsigned int r1r0)
120{
121 unsigned int i;
122 unsigned int reg_pupd, reg_set, reg_rst;
123 unsigned int bit_pupd, bit_r0, bit_r1;
124 const struct mtk_pin_spec_pupd_set *spec_pupd_pin;
125 bool find = false;
126
127 for (i = 0; i < ARRAY_SIZE(mt8173_spec_pupd); i++) {
128 if (pin == mt8173_spec_pupd[i].pin) {
129 find = true;
130 break;
131 }
132 }
133
134 if (!find)
135 return -EINVAL;
136
137 spec_pupd_pin = mt8173_spec_pupd + i;
138 reg_set = spec_pupd_pin->offset + align;
139 reg_rst = spec_pupd_pin->offset + (align << 1);
140
141 if (isup)
142 reg_pupd = reg_rst;
143 else
144 reg_pupd = reg_set;
145
146 bit_pupd = BIT(spec_pupd_pin->pupd_bit);
147 regmap_write(regmap, reg_pupd, bit_pupd);
148
149 bit_r0 = BIT(spec_pupd_pin->r0_bit);
150 bit_r1 = BIT(spec_pupd_pin->r1_bit);
151
152 switch (r1r0) {
153 case MTK_PUPD_SET_R1R0_00:
154 regmap_write(regmap, reg_rst, bit_r0);
155 regmap_write(regmap, reg_rst, bit_r1);
156 break;
157 case MTK_PUPD_SET_R1R0_01:
158 regmap_write(regmap, reg_set, bit_r0);
159 regmap_write(regmap, reg_rst, bit_r1);
160 break;
161 case MTK_PUPD_SET_R1R0_10:
162 regmap_write(regmap, reg_rst, bit_r0);
163 regmap_write(regmap, reg_set, bit_r1);
164 break;
165 case MTK_PUPD_SET_R1R0_11:
166 regmap_write(regmap, reg_set, bit_r0);
167 regmap_write(regmap, reg_set, bit_r1);
168 break;
169 default:
170 return -EINVAL;
171 }
172
173 return 0;
174}
175
176static const struct mtk_pin_ies_smt_set mt8173_ies_smt_set[] = {
177 MTK_PIN_IES_SMT_SET(0, 4, 0x930, 1),
178 MTK_PIN_IES_SMT_SET(5, 9, 0x930, 2),
179 MTK_PIN_IES_SMT_SET(10, 13, 0x930, 10),
180 MTK_PIN_IES_SMT_SET(14, 15, 0x940, 10),
181 MTK_PIN_IES_SMT_SET(16, 16, 0x930, 0),
182 MTK_PIN_IES_SMT_SET(17, 17, 0x950, 2),
183 MTK_PIN_IES_SMT_SET(18, 21, 0x940, 3),
184 MTK_PIN_IES_SMT_SET(29, 32, 0x930, 3),
185 MTK_PIN_IES_SMT_SET(33, 33, 0x930, 4),
186 MTK_PIN_IES_SMT_SET(34, 36, 0x930, 5),
187 MTK_PIN_IES_SMT_SET(37, 38, 0x930, 6),
188 MTK_PIN_IES_SMT_SET(39, 39, 0x930, 7),
189 MTK_PIN_IES_SMT_SET(40, 41, 0x930, 9),
190 MTK_PIN_IES_SMT_SET(42, 42, 0x940, 0),
191 MTK_PIN_IES_SMT_SET(43, 44, 0x930, 11),
192 MTK_PIN_IES_SMT_SET(45, 46, 0x930, 12),
193 MTK_PIN_IES_SMT_SET(57, 64, 0xc20, 13),
194 MTK_PIN_IES_SMT_SET(65, 65, 0xc10, 13),
195 MTK_PIN_IES_SMT_SET(66, 66, 0xc00, 13),
196 MTK_PIN_IES_SMT_SET(67, 67, 0xd10, 13),
197 MTK_PIN_IES_SMT_SET(68, 68, 0xd00, 13),
198 MTK_PIN_IES_SMT_SET(69, 72, 0x940, 14),
199 MTK_PIN_IES_SMT_SET(73, 76, 0xc60, 13),
200 MTK_PIN_IES_SMT_SET(77, 77, 0xc40, 13),
201 MTK_PIN_IES_SMT_SET(78, 78, 0xc50, 13),
202 MTK_PIN_IES_SMT_SET(79, 82, 0x940, 15),
203 MTK_PIN_IES_SMT_SET(83, 83, 0x950, 0),
204 MTK_PIN_IES_SMT_SET(84, 85, 0x950, 1),
205 MTK_PIN_IES_SMT_SET(86, 91, 0x950, 2),
206 MTK_PIN_IES_SMT_SET(92, 92, 0x930, 13),
207 MTK_PIN_IES_SMT_SET(93, 95, 0x930, 14),
208 MTK_PIN_IES_SMT_SET(96, 99, 0x930, 15),
209 MTK_PIN_IES_SMT_SET(100, 103, 0xca0, 13),
210 MTK_PIN_IES_SMT_SET(104, 104, 0xc80, 13),
211 MTK_PIN_IES_SMT_SET(105, 105, 0xc90, 13),
212 MTK_PIN_IES_SMT_SET(106, 107, 0x940, 4),
213 MTK_PIN_IES_SMT_SET(108, 112, 0x940, 1),
214 MTK_PIN_IES_SMT_SET(113, 116, 0x940, 2),
215 MTK_PIN_IES_SMT_SET(117, 118, 0x940, 5),
216 MTK_PIN_IES_SMT_SET(119, 124, 0x940, 6),
217 MTK_PIN_IES_SMT_SET(125, 126, 0x940, 7),
218 MTK_PIN_IES_SMT_SET(127, 127, 0x940, 0),
219 MTK_PIN_IES_SMT_SET(128, 128, 0x950, 8),
220 MTK_PIN_IES_SMT_SET(129, 130, 0x950, 9),
221 MTK_PIN_IES_SMT_SET(131, 132, 0x950, 8),
222 MTK_PIN_IES_SMT_SET(133, 134, 0x910, 8)
223};
224
225static int spec_ies_smt_set(struct regmap *regmap, unsigned int pin,
226 unsigned char align, int value)
227{
228 unsigned int i, reg_addr, bit;
229 bool find = false;
230
231 for (i = 0; i < ARRAY_SIZE(mt8173_ies_smt_set); i++) {
232 if (pin >= mt8173_ies_smt_set[i].start &&
233 pin <= mt8173_ies_smt_set[i].end) {
234 find = true;
235 break;
236 }
237 }
238
239 if (!find)
240 return -EINVAL;
241
242 if (value)
243 reg_addr = mt8173_ies_smt_set[i].offset + align;
244 else
245 reg_addr = mt8173_ies_smt_set[i].offset + (align << 1);
246
247 bit = BIT(mt8173_ies_smt_set[i].bit);
248 regmap_write(regmap, reg_addr, bit);
249 return 0;
250}
251
252static const struct mtk_drv_group_desc mt8173_drv_grp[] = {
253 /* 0E4E8SR 4/8/12/16 */
254 MTK_DRV_GRP(4, 16, 1, 2, 4),
255 /* 0E2E4SR 2/4/6/8 */
256 MTK_DRV_GRP(2, 8, 1, 2, 2),
257 /* E8E4E2 2/4/6/8/10/12/14/16 */
258 MTK_DRV_GRP(2, 16, 0, 2, 2)
259};
260
261static const struct mtk_pin_drv_grp mt8173_pin_drv[] = {
262 MTK_PIN_DRV_GRP(0, DRV_BASE+0x20, 12, 0),
263 MTK_PIN_DRV_GRP(1, DRV_BASE+0x20, 12, 0),
264 MTK_PIN_DRV_GRP(2, DRV_BASE+0x20, 12, 0),
265 MTK_PIN_DRV_GRP(3, DRV_BASE+0x20, 12, 0),
266 MTK_PIN_DRV_GRP(4, DRV_BASE+0x20, 12, 0),
267 MTK_PIN_DRV_GRP(5, DRV_BASE+0x30, 0, 0),
268 MTK_PIN_DRV_GRP(6, DRV_BASE+0x30, 0, 0),
269 MTK_PIN_DRV_GRP(7, DRV_BASE+0x30, 0, 0),
270 MTK_PIN_DRV_GRP(8, DRV_BASE+0x30, 0, 0),
271 MTK_PIN_DRV_GRP(9, DRV_BASE+0x30, 0, 0),
272 MTK_PIN_DRV_GRP(10, DRV_BASE+0x30, 4, 1),
273 MTK_PIN_DRV_GRP(11, DRV_BASE+0x30, 4, 1),
274 MTK_PIN_DRV_GRP(12, DRV_BASE+0x30, 4, 1),
275 MTK_PIN_DRV_GRP(13, DRV_BASE+0x30, 4, 1),
276 MTK_PIN_DRV_GRP(14, DRV_BASE+0x40, 8, 1),
277 MTK_PIN_DRV_GRP(15, DRV_BASE+0x40, 8, 1),
278 MTK_PIN_DRV_GRP(16, DRV_BASE, 8, 1),
279 MTK_PIN_DRV_GRP(17, 0xce0, 8, 2),
280 MTK_PIN_DRV_GRP(22, 0xce0, 8, 2),
281 MTK_PIN_DRV_GRP(23, 0xce0, 8, 2),
282 MTK_PIN_DRV_GRP(24, 0xce0, 8, 2),
283 MTK_PIN_DRV_GRP(25, 0xce0, 8, 2),
284 MTK_PIN_DRV_GRP(26, 0xcc0, 8, 2),
285 MTK_PIN_DRV_GRP(27, 0xcd0, 8, 2),
286 MTK_PIN_DRV_GRP(28, 0xd70, 8, 2),
287 MTK_PIN_DRV_GRP(29, DRV_BASE+0x80, 12, 1),
288 MTK_PIN_DRV_GRP(30, DRV_BASE+0x80, 12, 1),
289 MTK_PIN_DRV_GRP(31, DRV_BASE+0x80, 12, 1),
290 MTK_PIN_DRV_GRP(32, DRV_BASE+0x80, 12, 1),
291 MTK_PIN_DRV_GRP(33, DRV_BASE+0x10, 12, 1),
292 MTK_PIN_DRV_GRP(34, DRV_BASE+0x10, 8, 1),
293 MTK_PIN_DRV_GRP(35, DRV_BASE+0x10, 8, 1),
294 MTK_PIN_DRV_GRP(36, DRV_BASE+0x10, 8, 1),
295 MTK_PIN_DRV_GRP(37, DRV_BASE+0x10, 4, 1),
296 MTK_PIN_DRV_GRP(38, DRV_BASE+0x10, 4, 1),
297 MTK_PIN_DRV_GRP(39, DRV_BASE+0x20, 0, 0),
298 MTK_PIN_DRV_GRP(40, DRV_BASE+0x20, 8, 0),
299 MTK_PIN_DRV_GRP(41, DRV_BASE+0x20, 8, 0),
300 MTK_PIN_DRV_GRP(42, DRV_BASE+0x50, 8, 1),
301 MTK_PIN_DRV_GRP(57, 0xc20, 8, 2),
302 MTK_PIN_DRV_GRP(58, 0xc20, 8, 2),
303 MTK_PIN_DRV_GRP(59, 0xc20, 8, 2),
304 MTK_PIN_DRV_GRP(60, 0xc20, 8, 2),
305 MTK_PIN_DRV_GRP(61, 0xc20, 8, 2),
306 MTK_PIN_DRV_GRP(62, 0xc20, 8, 2),
307 MTK_PIN_DRV_GRP(63, 0xc20, 8, 2),
308 MTK_PIN_DRV_GRP(64, 0xc20, 8, 2),
309 MTK_PIN_DRV_GRP(65, 0xc00, 8, 2),
310 MTK_PIN_DRV_GRP(66, 0xc10, 8, 2),
311 MTK_PIN_DRV_GRP(67, 0xd10, 8, 2),
312 MTK_PIN_DRV_GRP(68, 0xd00, 8, 2),
313 MTK_PIN_DRV_GRP(69, DRV_BASE+0x80, 0, 1),
314 MTK_PIN_DRV_GRP(70, DRV_BASE+0x80, 0, 1),
315 MTK_PIN_DRV_GRP(71, DRV_BASE+0x80, 0, 1),
316 MTK_PIN_DRV_GRP(72, DRV_BASE+0x80, 0, 1),
317 MTK_PIN_DRV_GRP(73, 0xc60, 8, 2),
318 MTK_PIN_DRV_GRP(74, 0xc60, 8, 2),
319 MTK_PIN_DRV_GRP(75, 0xc60, 8, 2),
320 MTK_PIN_DRV_GRP(76, 0xc60, 8, 2),
321 MTK_PIN_DRV_GRP(77, 0xc40, 8, 2),
322 MTK_PIN_DRV_GRP(78, 0xc50, 8, 2),
323 MTK_PIN_DRV_GRP(79, DRV_BASE+0x70, 12, 1),
324 MTK_PIN_DRV_GRP(80, DRV_BASE+0x70, 12, 1),
325 MTK_PIN_DRV_GRP(81, DRV_BASE+0x70, 12, 1),
326 MTK_PIN_DRV_GRP(82, DRV_BASE+0x70, 12, 1),
327 MTK_PIN_DRV_GRP(83, DRV_BASE, 4, 1),
328 MTK_PIN_DRV_GRP(84, DRV_BASE, 0, 1),
329 MTK_PIN_DRV_GRP(85, DRV_BASE, 0, 1),
330 MTK_PIN_DRV_GRP(85, DRV_BASE+0x60, 8, 1),
331 MTK_PIN_DRV_GRP(86, DRV_BASE+0x60, 8, 1),
332 MTK_PIN_DRV_GRP(87, DRV_BASE+0x60, 8, 1),
333 MTK_PIN_DRV_GRP(88, DRV_BASE+0x60, 8, 1),
334 MTK_PIN_DRV_GRP(89, DRV_BASE+0x60, 8, 1),
335 MTK_PIN_DRV_GRP(90, DRV_BASE+0x60, 8, 1),
336 MTK_PIN_DRV_GRP(91, DRV_BASE+0x60, 8, 1),
337 MTK_PIN_DRV_GRP(92, DRV_BASE+0x60, 4, 0),
338 MTK_PIN_DRV_GRP(93, DRV_BASE+0x60, 0, 0),
339 MTK_PIN_DRV_GRP(94, DRV_BASE+0x60, 0, 0),
340 MTK_PIN_DRV_GRP(95, DRV_BASE+0x60, 0, 0),
341 MTK_PIN_DRV_GRP(96, DRV_BASE+0x80, 8, 1),
342 MTK_PIN_DRV_GRP(97, DRV_BASE+0x80, 8, 1),
343 MTK_PIN_DRV_GRP(98, DRV_BASE+0x80, 8, 1),
344 MTK_PIN_DRV_GRP(99, DRV_BASE+0x80, 8, 1),
345 MTK_PIN_DRV_GRP(100, 0xca0, 8, 2),
346 MTK_PIN_DRV_GRP(101, 0xca0, 8, 2),
347 MTK_PIN_DRV_GRP(102, 0xca0, 8, 2),
348 MTK_PIN_DRV_GRP(103, 0xca0, 8, 2),
349 MTK_PIN_DRV_GRP(104, 0xc80, 8, 2),
350 MTK_PIN_DRV_GRP(105, 0xc90, 8, 2),
351 MTK_PIN_DRV_GRP(108, DRV_BASE+0x50, 0, 1),
352 MTK_PIN_DRV_GRP(109, DRV_BASE+0x50, 0, 1),
353 MTK_PIN_DRV_GRP(110, DRV_BASE+0x50, 0, 1),
354 MTK_PIN_DRV_GRP(111, DRV_BASE+0x50, 0, 1),
355 MTK_PIN_DRV_GRP(112, DRV_BASE+0x50, 0, 1),
356 MTK_PIN_DRV_GRP(113, DRV_BASE+0x80, 4, 1),
357 MTK_PIN_DRV_GRP(114, DRV_BASE+0x80, 4, 1),
358 MTK_PIN_DRV_GRP(115, DRV_BASE+0x80, 4, 1),
359 MTK_PIN_DRV_GRP(116, DRV_BASE+0x80, 4, 1),
360 MTK_PIN_DRV_GRP(117, DRV_BASE+0x90, 0, 1),
361 MTK_PIN_DRV_GRP(118, DRV_BASE+0x90, 0, 1),
362 MTK_PIN_DRV_GRP(119, DRV_BASE+0x50, 4, 1),
363 MTK_PIN_DRV_GRP(120, DRV_BASE+0x50, 4, 1),
364 MTK_PIN_DRV_GRP(121, DRV_BASE+0x50, 4, 1),
365 MTK_PIN_DRV_GRP(122, DRV_BASE+0x50, 4, 1),
366 MTK_PIN_DRV_GRP(123, DRV_BASE+0x50, 4, 1),
367 MTK_PIN_DRV_GRP(124, DRV_BASE+0x50, 4, 1),
368 MTK_PIN_DRV_GRP(125, DRV_BASE+0x30, 12, 1),
369 MTK_PIN_DRV_GRP(126, DRV_BASE+0x30, 12, 1),
370 MTK_PIN_DRV_GRP(127, DRV_BASE+0x50, 8, 1),
371 MTK_PIN_DRV_GRP(128, DRV_BASE+0x40, 0, 1),
372 MTK_PIN_DRV_GRP(129, DRV_BASE+0x40, 0, 1),
373 MTK_PIN_DRV_GRP(130, DRV_BASE+0x40, 0, 1),
374 MTK_PIN_DRV_GRP(131, DRV_BASE+0x40, 0, 1),
375 MTK_PIN_DRV_GRP(132, DRV_BASE+0x40, 0, 1)
376};
377
378static const struct mtk_pinctrl_devdata mt8173_pinctrl_data = {
379 .pins = mtk_pins_mt8173,
380 .npins = ARRAY_SIZE(mtk_pins_mt8173),
381 .grp_desc = mt8173_drv_grp,
382 .n_grp_cls = ARRAY_SIZE(mt8173_drv_grp),
383 .pin_drv_grp = mt8173_pin_drv,
384 .n_pin_drv_grps = ARRAY_SIZE(mt8173_pin_drv),
385 .spec_pull_set = spec_pull_set,
386 .spec_ies_smt_set = spec_ies_smt_set,
387 .dir_offset = 0x0000,
388 .pullen_offset = 0x0100,
389 .pullsel_offset = 0x0200,
390 .dout_offset = 0x0400,
391 .din_offset = 0x0500,
392 .pinmux_offset = 0x0600,
393 .type1_start = 135,
394 .type1_end = 135,
395 .port_shf = 4,
396 .port_mask = 0xf,
397 .port_align = 4,
398 .eint_offsets = {
399 .name = "mt8173_eint",
400 .stat = 0x000,
401 .ack = 0x040,
402 .mask = 0x080,
403 .mask_set = 0x0c0,
404 .mask_clr = 0x100,
405 .sens = 0x140,
406 .sens_set = 0x180,
407 .sens_clr = 0x1c0,
408 .pol = 0x300,
409 .pol_set = 0x340,
410 .pol_clr = 0x380,
411 .dom_en = 0x400,
412 .dbnc_ctrl = 0x500,
413 .dbnc_set = 0x600,
414 .dbnc_clr = 0x700,
415 .port_mask = 7,
416 .ports = 6,
417 },
418 .ap_num = 224,
419 .db_cnt = 16,
420};
421
422static int mt8173_pinctrl_probe(struct platform_device *pdev)
423{
424 return mtk_pctrl_init(pdev, &mt8173_pinctrl_data);
425}
426
427static struct of_device_id mt8173_pctrl_match[] = {
428 {
429 .compatible = "mediatek,mt8173-pinctrl",
430 }, {
431 }
432};
433MODULE_DEVICE_TABLE(of, mt8173_pctrl_match);
434
435static struct platform_driver mtk_pinctrl_driver = {
436 .probe = mt8173_pinctrl_probe,
437 .driver = {
438 .name = "mediatek-mt8173-pinctrl",
439 .of_match_table = mt8173_pctrl_match,
440 },
441};
442
443static int __init mtk_pinctrl_init(void)
444{
445 return platform_driver_register(&mtk_pinctrl_driver);
446}
447
448module_init(mtk_pinctrl_init);
449
450MODULE_LICENSE("GPL v2");
451MODULE_DESCRIPTION("MediaTek Pinctrl Driver");
452MODULE_AUTHOR("Hongzhou Yang <hongzhou.yang@mediatek.com>");
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index 7e113e12d526..2864fe333ad9 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -32,6 +32,7 @@
32#include <linux/regmap.h> 32#include <linux/regmap.h>
33#include <linux/mfd/syscon.h> 33#include <linux/mfd/syscon.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <linux/interrupt.h>
35#include <dt-bindings/pinctrl/mt65xx.h> 36#include <dt-bindings/pinctrl/mt65xx.h>
36 37
37#include "../core.h" 38#include "../core.h"
@@ -111,6 +112,19 @@ static void mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
111{ 112{
112 unsigned int reg_addr, offset; 113 unsigned int reg_addr, offset;
113 unsigned int bit; 114 unsigned int bit;
115 int ret;
116
117 /*
118 * Due to some pins are irregular, their input enable and smt
119 * control register are discontinuous, but they are mapping together.
120 * So we need this special handle.
121 */
122 if (pctl->devdata->spec_ies_smt_set) {
123 ret = pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
124 pin, pctl->devdata->port_align, value);
125 if (!ret)
126 return;
127 }
114 128
115 bit = BIT(pin & 0xf); 129 bit = BIT(pin & 0xf);
116 130
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
index 8d7d32b68da5..740e6d227d0f 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
@@ -154,6 +154,11 @@ struct mtk_eint_offsets {
154 * up/down bit, R0 and R1 resistor bit, so they need special pull setting. 154 * up/down bit, R0 and R1 resistor bit, so they need special pull setting.
155 * If special setting is success, this should return 0, otherwise it should 155 * If special setting is success, this should return 0, otherwise it should
156 * return non-zero value. 156 * return non-zero value.
157 * @spec_ies_smt_set: Some pins are irregular, their input enable and smt
158 * control register are discontinuous, but they are mapping together. That
159 * means when user set smt, input enable is set at the same time. So they
160 * also need special control. If special control is success, this should
161 * return 0, otherwise return non-zero value.
157 * 162 *
158 * @dir_offset: The direction register offset. 163 * @dir_offset: The direction register offset.
159 * @pullen_offset: The pull-up/pull-down enable register offset. 164 * @pullen_offset: The pull-up/pull-down enable register offset.
@@ -177,6 +182,8 @@ struct mtk_pinctrl_devdata {
177 unsigned int n_pin_drv_grps; 182 unsigned int n_pin_drv_grps;
178 int (*spec_pull_set)(struct regmap *reg, unsigned int pin, 183 int (*spec_pull_set)(struct regmap *reg, unsigned int pin,
179 unsigned char align, bool isup, unsigned int arg); 184 unsigned char align, bool isup, unsigned int arg);
185 int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin,
186 unsigned char align, int value);
180 unsigned int dir_offset; 187 unsigned int dir_offset;
181 unsigned int ies_offset; 188 unsigned int ies_offset;
182 unsigned int smt_offset; 189 unsigned int smt_offset;
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt8173.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8173.h
new file mode 100644
index 000000000000..c1a3ca01ef00
--- /dev/null
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8173.h
@@ -0,0 +1,1226 @@
1/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __PINCTRL_MTK_MT8173_H
16#define __PINCTRL_MTK_MT8173_H
17
18#include <linux/pinctrl/pinctrl.h>
19#include <pinctrl-mtk-common.h>
20
21static const struct mtk_desc_pin mtk_pins_mt8173[] = {
22 MTK_PIN(
23 PINCTRL_PIN(0, "EINT0"),
24 NULL, "mt8173",
25 MTK_EINT_FUNCTION(0, 0),
26 MTK_FUNCTION(0, "GPIO0"),
27 MTK_FUNCTION(1, "IRDA_PDN"),
28 MTK_FUNCTION(2, "I2S1_WS"),
29 MTK_FUNCTION(3, "AUD_SPDIF"),
30 MTK_FUNCTION(4, "UTXD0"),
31 MTK_FUNCTION(7, "DBG_MON_A_20_")
32 ),
33 MTK_PIN(
34 PINCTRL_PIN(1, "EINT1"),
35 NULL, "mt8173",
36 MTK_EINT_FUNCTION(0, 1),
37 MTK_FUNCTION(0, "GPIO1"),
38 MTK_FUNCTION(1, "IRDA_RXD"),
39 MTK_FUNCTION(2, "I2S1_BCK"),
40 MTK_FUNCTION(3, "SDA5"),
41 MTK_FUNCTION(4, "URXD0"),
42 MTK_FUNCTION(7, "DBG_MON_A_21_")
43 ),
44 MTK_PIN(
45 PINCTRL_PIN(2, "EINT2"),
46 NULL, "mt8173",
47 MTK_EINT_FUNCTION(0, 2),
48 MTK_FUNCTION(0, "GPIO2"),
49 MTK_FUNCTION(1, "IRDA_TXD"),
50 MTK_FUNCTION(2, "I2S1_MCK"),
51 MTK_FUNCTION(3, "SCL5"),
52 MTK_FUNCTION(4, "UTXD3"),
53 MTK_FUNCTION(7, "DBG_MON_A_22_")
54 ),
55 MTK_PIN(
56 PINCTRL_PIN(3, "EINT3"),
57 NULL, "mt8173",
58 MTK_EINT_FUNCTION(0, 3),
59 MTK_FUNCTION(0, "GPIO3"),
60 MTK_FUNCTION(1, "DSI1_TE"),
61 MTK_FUNCTION(2, "I2S1_DO_1"),
62 MTK_FUNCTION(3, "SDA3"),
63 MTK_FUNCTION(4, "URXD3"),
64 MTK_FUNCTION(7, "DBG_MON_A_23_")
65 ),
66 MTK_PIN(
67 PINCTRL_PIN(4, "EINT4"),
68 NULL, "mt8173",
69 MTK_EINT_FUNCTION(0, 4),
70 MTK_FUNCTION(0, "GPIO4"),
71 MTK_FUNCTION(1, "DISP_PWM1"),
72 MTK_FUNCTION(2, "I2S1_DO_2"),
73 MTK_FUNCTION(3, "SCL3"),
74 MTK_FUNCTION(4, "UCTS3"),
75 MTK_FUNCTION(6, "SFWP_B")
76 ),
77 MTK_PIN(
78 PINCTRL_PIN(5, "EINT5"),
79 NULL, "mt8173",
80 MTK_EINT_FUNCTION(0, 5),
81 MTK_FUNCTION(0, "GPIO5"),
82 MTK_FUNCTION(1, "PCM1_CLK"),
83 MTK_FUNCTION(2, "I2S2_WS"),
84 MTK_FUNCTION(3, "SPI_CK_3_"),
85 MTK_FUNCTION(4, "URTS3"),
86 MTK_FUNCTION(5, "AP_MD32_JTAG_TMS"),
87 MTK_FUNCTION(6, "SFOUT")
88 ),
89 MTK_PIN(
90 PINCTRL_PIN(6, "EINT6"),
91 NULL, "mt8173",
92 MTK_EINT_FUNCTION(0, 6),
93 MTK_FUNCTION(0, "GPIO6"),
94 MTK_FUNCTION(1, "PCM1_SYNC"),
95 MTK_FUNCTION(2, "I2S2_BCK"),
96 MTK_FUNCTION(3, "SPI_MI_3_"),
97 MTK_FUNCTION(5, "AP_MD32_JTAG_TCK"),
98 MTK_FUNCTION(6, "SFCS0")
99 ),
100 MTK_PIN(
101 PINCTRL_PIN(7, "EINT7"),
102 NULL, "mt8173",
103 MTK_EINT_FUNCTION(0, 7),
104 MTK_FUNCTION(0, "GPIO7"),
105 MTK_FUNCTION(1, "PCM1_DI"),
106 MTK_FUNCTION(2, "I2S2_DI_1"),
107 MTK_FUNCTION(3, "SPI_MO_3_"),
108 MTK_FUNCTION(5, "AP_MD32_JTAG_TDI"),
109 MTK_FUNCTION(6, "SFHOLD")
110 ),
111 MTK_PIN(
112 PINCTRL_PIN(8, "EINT8"),
113 NULL, "mt8173",
114 MTK_EINT_FUNCTION(0, 8),
115 MTK_FUNCTION(0, "GPIO8"),
116 MTK_FUNCTION(1, "PCM1_DO"),
117 MTK_FUNCTION(2, "I2S2_DI_2"),
118 MTK_FUNCTION(3, "SPI_CS_3_"),
119 MTK_FUNCTION(4, "AUD_SPDIF"),
120 MTK_FUNCTION(5, "AP_MD32_JTAG_TDO"),
121 MTK_FUNCTION(6, "SFIN")
122 ),
123 MTK_PIN(
124 PINCTRL_PIN(9, "EINT9"),
125 NULL, "mt8173",
126 MTK_EINT_FUNCTION(0, 9),
127 MTK_FUNCTION(0, "GPIO9"),
128 MTK_FUNCTION(1, "USB_DRVVBUS_P0"),
129 MTK_FUNCTION(2, "I2S2_MCK"),
130 MTK_FUNCTION(4, "USB_DRVVBUS_P1"),
131 MTK_FUNCTION(5, "AP_MD32_JTAG_TRST"),
132 MTK_FUNCTION(6, "SFCK")
133 ),
134 MTK_PIN(
135 PINCTRL_PIN(10, "EINT10"),
136 NULL, "mt8173",
137 MTK_EINT_FUNCTION(0, 10),
138 MTK_FUNCTION(0, "GPIO10"),
139 MTK_FUNCTION(1, "CLKM0"),
140 MTK_FUNCTION(2, "DSI1_TE"),
141 MTK_FUNCTION(3, "DISP_PWM1"),
142 MTK_FUNCTION(4, "PWM4"),
143 MTK_FUNCTION(5, "IRDA_RXD")
144 ),
145 MTK_PIN(
146 PINCTRL_PIN(11, "EINT11"),
147 NULL, "mt8173",
148 MTK_EINT_FUNCTION(0, 11),
149 MTK_FUNCTION(0, "GPIO11"),
150 MTK_FUNCTION(1, "CLKM1"),
151 MTK_FUNCTION(2, "I2S3_WS"),
152 MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
153 MTK_FUNCTION(4, "PWM5"),
154 MTK_FUNCTION(5, "IRDA_TXD"),
155 MTK_FUNCTION(6, "USB_DRVVBUS_P1"),
156 MTK_FUNCTION(7, "DBG_MON_B_30_")
157 ),
158 MTK_PIN(
159 PINCTRL_PIN(12, "EINT12"),
160 NULL, "mt8173",
161 MTK_EINT_FUNCTION(0, 12),
162 MTK_FUNCTION(0, "GPIO12"),
163 MTK_FUNCTION(1, "CLKM2"),
164 MTK_FUNCTION(2, "I2S3_BCK"),
165 MTK_FUNCTION(3, "SRCLKENA0"),
166 MTK_FUNCTION(5, "I2S2_WS"),
167 MTK_FUNCTION(7, "DBG_MON_B_32_")
168 ),
169 MTK_PIN(
170 PINCTRL_PIN(13, "EINT13"),
171 NULL, "mt8173",
172 MTK_EINT_FUNCTION(0, 13),
173 MTK_FUNCTION(0, "GPIO13"),
174 MTK_FUNCTION(1, "CLKM3"),
175 MTK_FUNCTION(2, "I2S3_MCK"),
176 MTK_FUNCTION(3, "SRCLKENA0"),
177 MTK_FUNCTION(5, "I2S2_BCK"),
178 MTK_FUNCTION(7, "DBG_MON_A_32_")
179 ),
180 MTK_PIN(
181 PINCTRL_PIN(14, "EINT14"),
182 NULL, "mt8173",
183 MTK_EINT_FUNCTION(0, 14),
184 MTK_FUNCTION(0, "GPIO14"),
185 MTK_FUNCTION(1, "CMDAT0"),
186 MTK_FUNCTION(2, "CMCSD0"),
187 MTK_FUNCTION(4, "CLKM2"),
188 MTK_FUNCTION(7, "DBG_MON_B_6_")
189 ),
190 MTK_PIN(
191 PINCTRL_PIN(15, "EINT15"),
192 NULL, "mt8173",
193 MTK_EINT_FUNCTION(0, 15),
194 MTK_FUNCTION(0, "GPIO15"),
195 MTK_FUNCTION(1, "CMDAT1"),
196 MTK_FUNCTION(2, "CMCSD1"),
197 MTK_FUNCTION(3, "CMFLASH"),
198 MTK_FUNCTION(4, "CLKM3"),
199 MTK_FUNCTION(7, "DBG_MON_B_29_")
200 ),
201 MTK_PIN(
202 PINCTRL_PIN(16, "IDDIG"),
203 NULL, "mt8173",
204 MTK_EINT_FUNCTION(0, 16),
205 MTK_FUNCTION(0, "GPIO16"),
206 MTK_FUNCTION(1, "IDDIG"),
207 MTK_FUNCTION(2, "CMFLASH"),
208 MTK_FUNCTION(4, "PWM5")
209 ),
210 MTK_PIN(
211 PINCTRL_PIN(17, "WATCHDOG"),
212 NULL, "mt8173",
213 MTK_EINT_FUNCTION(0, 17),
214 MTK_FUNCTION(0, "GPIO17"),
215 MTK_FUNCTION(1, "WATCHDOG_AO")
216 ),
217 MTK_PIN(
218 PINCTRL_PIN(18, "CEC"),
219 NULL, "mt8173",
220 MTK_EINT_FUNCTION(0, 18),
221 MTK_FUNCTION(0, "GPIO18"),
222 MTK_FUNCTION(1, "CEC")
223 ),
224 MTK_PIN(
225 PINCTRL_PIN(19, "HDMISCK"),
226 NULL, "mt8173",
227 MTK_EINT_FUNCTION(0, 19),
228 MTK_FUNCTION(0, "GPIO19"),
229 MTK_FUNCTION(1, "HDMISCK"),
230 MTK_FUNCTION(2, "HDCP_SCL")
231 ),
232 MTK_PIN(
233 PINCTRL_PIN(20, "HDMISD"),
234 NULL, "mt8173",
235 MTK_EINT_FUNCTION(0, 20),
236 MTK_FUNCTION(0, "GPIO20"),
237 MTK_FUNCTION(1, "HDMISD"),
238 MTK_FUNCTION(2, "HDCP_SDA")
239 ),
240 MTK_PIN(
241 PINCTRL_PIN(21, "HTPLG"),
242 NULL, "mt8173",
243 MTK_EINT_FUNCTION(0, 21),
244 MTK_FUNCTION(0, "GPIO21"),
245 MTK_FUNCTION(1, "HTPLG")
246 ),
247 MTK_PIN(
248 PINCTRL_PIN(22, "MSDC3_DAT0"),
249 NULL, "mt8173",
250 MTK_EINT_FUNCTION(0, 22),
251 MTK_FUNCTION(0, "GPIO22"),
252 MTK_FUNCTION(1, "MSDC3_DAT0")
253 ),
254 MTK_PIN(
255 PINCTRL_PIN(23, "MSDC3_DAT1"),
256 NULL, "mt8173",
257 MTK_EINT_FUNCTION(0, 23),
258 MTK_FUNCTION(0, "GPIO23"),
259 MTK_FUNCTION(1, "MSDC3_DAT1")
260 ),
261 MTK_PIN(
262 PINCTRL_PIN(24, "MSDC3_DAT2"),
263 NULL, "mt8173",
264 MTK_EINT_FUNCTION(0, 24),
265 MTK_FUNCTION(0, "GPIO24"),
266 MTK_FUNCTION(1, "MSDC3_DAT2")
267 ),
268 MTK_PIN(
269 PINCTRL_PIN(25, "MSDC3_DAT3"),
270 NULL, "mt8173",
271 MTK_EINT_FUNCTION(0, 25),
272 MTK_FUNCTION(0, "GPIO25"),
273 MTK_FUNCTION(1, "MSDC3_DAT3")
274 ),
275 MTK_PIN(
276 PINCTRL_PIN(26, "MSDC3_CLK"),
277 NULL, "mt8173",
278 MTK_EINT_FUNCTION(0, 26),
279 MTK_FUNCTION(0, "GPIO26"),
280 MTK_FUNCTION(1, "MSDC3_CLK")
281 ),
282 MTK_PIN(
283 PINCTRL_PIN(27, "MSDC3_CMD"),
284 NULL, "mt8173",
285 MTK_EINT_FUNCTION(0, 27),
286 MTK_FUNCTION(0, "GPIO27"),
287 MTK_FUNCTION(1, "MSDC3_CMD")
288 ),
289 MTK_PIN(
290 PINCTRL_PIN(28, "MSDC3_DSL"),
291 NULL, "mt8173",
292 MTK_EINT_FUNCTION(0, 28),
293 MTK_FUNCTION(0, "GPIO28"),
294 MTK_FUNCTION(1, "MSDC3_DSL")
295 ),
296 MTK_PIN(
297 PINCTRL_PIN(29, "UCTS2"),
298 NULL, "mt8173",
299 MTK_EINT_FUNCTION(0, 29),
300 MTK_FUNCTION(0, "GPIO29"),
301 MTK_FUNCTION(1, "UCTS2")
302 ),
303 MTK_PIN(
304 PINCTRL_PIN(30, "URTS2"),
305 NULL, "mt8173",
306 MTK_EINT_FUNCTION(0, 30),
307 MTK_FUNCTION(0, "GPIO30"),
308 MTK_FUNCTION(1, "URTS2")
309 ),
310 MTK_PIN(
311 PINCTRL_PIN(31, "URXD2"),
312 NULL, "mt8173",
313 MTK_EINT_FUNCTION(0, 31),
314 MTK_FUNCTION(0, "GPIO31"),
315 MTK_FUNCTION(1, "URXD2"),
316 MTK_FUNCTION(2, "UTXD2")
317 ),
318 MTK_PIN(
319 PINCTRL_PIN(32, "UTXD2"),
320 NULL, "mt8173",
321 MTK_EINT_FUNCTION(0, 32),
322 MTK_FUNCTION(0, "GPIO32"),
323 MTK_FUNCTION(1, "UTXD2"),
324 MTK_FUNCTION(2, "URXD2")
325 ),
326 MTK_PIN(
327 PINCTRL_PIN(33, "DAICLK"),
328 NULL, "mt8173",
329 MTK_EINT_FUNCTION(0, 33),
330 MTK_FUNCTION(0, "GPIO33"),
331 MTK_FUNCTION(1, " MRG_CLK"),
332 MTK_FUNCTION(2, "PCM0_CLK")
333 ),
334 MTK_PIN(
335 PINCTRL_PIN(34, "DAIPCMIN"),
336 NULL, "mt8173",
337 MTK_EINT_FUNCTION(0, 34),
338 MTK_FUNCTION(0, "GPIO34"),
339 MTK_FUNCTION(1, " MRG_DI"),
340 MTK_FUNCTION(2, "PCM0_DI")
341 ),
342 MTK_PIN(
343 PINCTRL_PIN(35, "DAIPCMOUT"),
344 NULL, "mt8173",
345 MTK_EINT_FUNCTION(0, 35),
346 MTK_FUNCTION(0, "GPIO35"),
347 MTK_FUNCTION(1, " MRG_DO"),
348 MTK_FUNCTION(2, "PCM0_DO")
349 ),
350 MTK_PIN(
351 PINCTRL_PIN(36, "DAISYNC"),
352 NULL, "mt8173",
353 MTK_EINT_FUNCTION(0, 36),
354 MTK_FUNCTION(0, "GPIO36"),
355 MTK_FUNCTION(1, " MRG_SYNC"),
356 MTK_FUNCTION(2, "PCM0_SYNC")
357 ),
358 MTK_PIN(
359 PINCTRL_PIN(37, "EINT16"),
360 NULL, "mt8173",
361 MTK_EINT_FUNCTION(0, 37),
362 MTK_FUNCTION(0, "GPIO37"),
363 MTK_FUNCTION(1, "USB_DRVVBUS_P0"),
364 MTK_FUNCTION(2, "USB_DRVVBUS_P1"),
365 MTK_FUNCTION(3, "PWM0"),
366 MTK_FUNCTION(4, "PWM1"),
367 MTK_FUNCTION(5, "PWM2"),
368 MTK_FUNCTION(6, "CLKM0")
369 ),
370 MTK_PIN(
371 PINCTRL_PIN(38, "CONN_RST"),
372 NULL, "mt8173",
373 MTK_EINT_FUNCTION(0, 38),
374 MTK_FUNCTION(0, "GPIO38"),
375 MTK_FUNCTION(1, "USB_DRVVBUS_P0"),
376 MTK_FUNCTION(2, "USB_DRVVBUS_P1"),
377 MTK_FUNCTION(6, "CLKM1")
378 ),
379 MTK_PIN(
380 PINCTRL_PIN(39, "CM2MCLK"),
381 NULL, "mt8173",
382 MTK_EINT_FUNCTION(0, 39),
383 MTK_FUNCTION(0, "GPIO39"),
384 MTK_FUNCTION(1, "CM2MCLK"),
385 MTK_FUNCTION(2, "CMCSD0"),
386 MTK_FUNCTION(7, "DBG_MON_A_17_")
387 ),
388 MTK_PIN(
389 PINCTRL_PIN(40, "CMPCLK"),
390 NULL, "mt8173",
391 MTK_EINT_FUNCTION(0, 40),
392 MTK_FUNCTION(0, "GPIO40"),
393 MTK_FUNCTION(1, "CMPCLK"),
394 MTK_FUNCTION(2, "CMCSK"),
395 MTK_FUNCTION(3, "CMCSD2"),
396 MTK_FUNCTION(7, "DBG_MON_A_18_")
397 ),
398 MTK_PIN(
399 PINCTRL_PIN(41, "CMMCLK"),
400 NULL, "mt8173",
401 MTK_EINT_FUNCTION(0, 41),
402 MTK_FUNCTION(0, "GPIO41"),
403 MTK_FUNCTION(1, "CMMCLK"),
404 MTK_FUNCTION(7, "DBG_MON_A_19_")
405 ),
406 MTK_PIN(
407 PINCTRL_PIN(42, "DSI_TE"),
408 NULL, "mt8173",
409 MTK_EINT_FUNCTION(0, 42),
410 MTK_FUNCTION(0, "GPIO42"),
411 MTK_FUNCTION(1, "DSI_TE")
412 ),
413 MTK_PIN(
414 PINCTRL_PIN(43, "SDA2"),
415 NULL, "mt8173",
416 MTK_EINT_FUNCTION(0, 43),
417 MTK_FUNCTION(0, "GPIO43"),
418 MTK_FUNCTION(1, "SDA2")
419 ),
420 MTK_PIN(
421 PINCTRL_PIN(44, "SCL2"),
422 NULL, "mt8173",
423 MTK_EINT_FUNCTION(0, 44),
424 MTK_FUNCTION(0, "GPIO44"),
425 MTK_FUNCTION(1, "SCL2")
426 ),
427 MTK_PIN(
428 PINCTRL_PIN(45, "SDA0"),
429 NULL, "mt8173",
430 MTK_EINT_FUNCTION(0, 45),
431 MTK_FUNCTION(0, "GPIO45"),
432 MTK_FUNCTION(1, "SDA0")
433 ),
434 MTK_PIN(
435 PINCTRL_PIN(46, "SCL0"),
436 NULL, "mt8173",
437 MTK_EINT_FUNCTION(0, 46),
438 MTK_FUNCTION(0, "GPIO46"),
439 MTK_FUNCTION(1, "SCL0")
440 ),
441 MTK_PIN(
442 PINCTRL_PIN(47, "RDN0_A"),
443 NULL, "mt8173",
444 MTK_EINT_FUNCTION(0, 47),
445 MTK_FUNCTION(0, "GPIO47"),
446 MTK_FUNCTION(1, "CMDAT2")
447 ),
448 MTK_PIN(
449 PINCTRL_PIN(48, "RDP0_A"),
450 NULL, "mt8173",
451 MTK_EINT_FUNCTION(0, 48),
452 MTK_FUNCTION(0, "GPIO48"),
453 MTK_FUNCTION(1, "CMDAT3")
454 ),
455 MTK_PIN(
456 PINCTRL_PIN(49, "RDN1_A"),
457 NULL, "mt8173",
458 MTK_EINT_FUNCTION(0, 49),
459 MTK_FUNCTION(0, "GPIO49"),
460 MTK_FUNCTION(1, "CMDAT4")
461 ),
462 MTK_PIN(
463 PINCTRL_PIN(50, "RDP1_A"),
464 NULL, "mt8173",
465 MTK_EINT_FUNCTION(0, 50),
466 MTK_FUNCTION(0, "GPIO50"),
467 MTK_FUNCTION(1, "CMDAT5")
468 ),
469 MTK_PIN(
470 PINCTRL_PIN(51, "RCN_A"),
471 NULL, "mt8173",
472 MTK_EINT_FUNCTION(0, 51),
473 MTK_FUNCTION(0, "GPIO51"),
474 MTK_FUNCTION(1, "CMDAT6")
475 ),
476 MTK_PIN(
477 PINCTRL_PIN(52, "RCP_A"),
478 NULL, "mt8173",
479 MTK_EINT_FUNCTION(0, 52),
480 MTK_FUNCTION(0, "GPIO52"),
481 MTK_FUNCTION(1, "CMDAT7")
482 ),
483 MTK_PIN(
484 PINCTRL_PIN(53, "RDN2_A"),
485 NULL, "mt8173",
486 MTK_EINT_FUNCTION(0, 53),
487 MTK_FUNCTION(0, "GPIO53"),
488 MTK_FUNCTION(1, "CMDAT8"),
489 MTK_FUNCTION(2, "CMCSD3")
490 ),
491 MTK_PIN(
492 PINCTRL_PIN(54, "RDP2_A"),
493 NULL, "mt8173",
494 MTK_EINT_FUNCTION(0, 54),
495 MTK_FUNCTION(0, "GPIO54"),
496 MTK_FUNCTION(1, "CMDAT9"),
497 MTK_FUNCTION(2, "CMCSD2")
498 ),
499 MTK_PIN(
500 PINCTRL_PIN(55, "RDN3_A"),
501 NULL, "mt8173",
502 MTK_EINT_FUNCTION(0, 55),
503 MTK_FUNCTION(0, "GPIO55"),
504 MTK_FUNCTION(1, "CMHSYNC"),
505 MTK_FUNCTION(2, "CMCSD1")
506 ),
507 MTK_PIN(
508 PINCTRL_PIN(56, "RDP3_A"),
509 NULL, "mt8173",
510 MTK_EINT_FUNCTION(0, 56),
511 MTK_FUNCTION(0, "GPIO56"),
512 MTK_FUNCTION(1, "CMVSYNC"),
513 MTK_FUNCTION(2, "CMCSD0")
514 ),
515 MTK_PIN(
516 PINCTRL_PIN(57, "MSDC0_DAT0"),
517 NULL, "mt8173",
518 MTK_EINT_FUNCTION(0, 57),
519 MTK_FUNCTION(0, "GPIO57"),
520 MTK_FUNCTION(1, "MSDC0_DAT0"),
521 MTK_FUNCTION(2, "I2S1_WS"),
522 MTK_FUNCTION(7, "DBG_MON_B_7_")
523 ),
524 MTK_PIN(
525 PINCTRL_PIN(58, "MSDC0_DAT1"),
526 NULL, "mt8173",
527 MTK_EINT_FUNCTION(0, 58),
528 MTK_FUNCTION(0, "GPIO58"),
529 MTK_FUNCTION(1, "MSDC0_DAT1"),
530 MTK_FUNCTION(2, "I2S1_BCK"),
531 MTK_FUNCTION(7, "DBG_MON_B_8_")
532 ),
533 MTK_PIN(
534 PINCTRL_PIN(59, "MSDC0_DAT2"),
535 NULL, "mt8173",
536 MTK_EINT_FUNCTION(0, 59),
537 MTK_FUNCTION(0, "GPIO59"),
538 MTK_FUNCTION(1, "MSDC0_DAT2"),
539 MTK_FUNCTION(2, "I2S1_MCK"),
540 MTK_FUNCTION(7, "DBG_MON_B_9_")
541 ),
542 MTK_PIN(
543 PINCTRL_PIN(60, "MSDC0_DAT3"),
544 NULL, "mt8173",
545 MTK_EINT_FUNCTION(0, 60),
546 MTK_FUNCTION(0, "GPIO60"),
547 MTK_FUNCTION(1, "MSDC0_DAT3"),
548 MTK_FUNCTION(2, "I2S1_DO_1"),
549 MTK_FUNCTION(7, "DBG_MON_B_10_")
550 ),
551 MTK_PIN(
552 PINCTRL_PIN(61, "MSDC0_DAT4"),
553 NULL, "mt8173",
554 MTK_EINT_FUNCTION(0, 61),
555 MTK_FUNCTION(0, "GPIO61"),
556 MTK_FUNCTION(1, "MSDC0_DAT4"),
557 MTK_FUNCTION(2, "I2S1_DO_2"),
558 MTK_FUNCTION(7, "DBG_MON_B_11_")
559 ),
560 MTK_PIN(
561 PINCTRL_PIN(62, "MSDC0_DAT5"),
562 NULL, "mt8173",
563 MTK_EINT_FUNCTION(0, 62),
564 MTK_FUNCTION(0, "GPIO62"),
565 MTK_FUNCTION(1, "MSDC0_DAT5"),
566 MTK_FUNCTION(2, "I2S2_WS"),
567 MTK_FUNCTION(7, "DBG_MON_B_12_")
568 ),
569 MTK_PIN(
570 PINCTRL_PIN(63, "MSDC0_DAT6"),
571 NULL, "mt8173",
572 MTK_EINT_FUNCTION(0, 63),
573 MTK_FUNCTION(0, "GPIO63"),
574 MTK_FUNCTION(1, "MSDC0_DAT6"),
575 MTK_FUNCTION(2, "I2S2_BCK"),
576 MTK_FUNCTION(7, "DBG_MON_B_13_")
577 ),
578 MTK_PIN(
579 PINCTRL_PIN(64, "MSDC0_DAT7"),
580 NULL, "mt8173",
581 MTK_EINT_FUNCTION(0, 64),
582 MTK_FUNCTION(0, "GPIO64"),
583 MTK_FUNCTION(1, "MSDC0_DAT7"),
584 MTK_FUNCTION(2, "I2S2_DI_1"),
585 MTK_FUNCTION(7, "DBG_MON_B_14_")
586 ),
587 MTK_PIN(
588 PINCTRL_PIN(65, "MSDC0_CLK"),
589 NULL, "mt8173",
590 MTK_EINT_FUNCTION(0, 65),
591 MTK_FUNCTION(0, "GPIO65"),
592 MTK_FUNCTION(1, "MSDC0_CLK"),
593 MTK_FUNCTION(7, "DBG_MON_B_16_")
594 ),
595 MTK_PIN(
596 PINCTRL_PIN(66, "MSDC0_CMD"),
597 NULL, "mt8173",
598 MTK_EINT_FUNCTION(0, 66),
599 MTK_FUNCTION(0, "GPIO66"),
600 MTK_FUNCTION(1, "MSDC0_CMD"),
601 MTK_FUNCTION(2, "I2S2_DI_2"),
602 MTK_FUNCTION(7, "DBG_MON_B_15_")
603 ),
604 MTK_PIN(
605 PINCTRL_PIN(67, "MSDC0_DSL"),
606 NULL, "mt8173",
607 MTK_EINT_FUNCTION(0, 67),
608 MTK_FUNCTION(0, "GPIO67"),
609 MTK_FUNCTION(1, "MSDC0_DSL"),
610 MTK_FUNCTION(7, "DBG_MON_B_17_")
611 ),
612 MTK_PIN(
613 PINCTRL_PIN(68, "MSDC0_RST_"),
614 NULL, "mt8173",
615 MTK_EINT_FUNCTION(0, 68),
616 MTK_FUNCTION(0, "GPIO68"),
617 MTK_FUNCTION(1, "MSDC0_RSTB"),
618 MTK_FUNCTION(2, "I2S2_MCK"),
619 MTK_FUNCTION(7, "DBG_MON_B_18_")
620 ),
621 MTK_PIN(
622 PINCTRL_PIN(69, "SPI_CK"),
623 NULL, "mt8173",
624 MTK_EINT_FUNCTION(0, 69),
625 MTK_FUNCTION(0, "GPIO69"),
626 MTK_FUNCTION(1, "SPI_CK_0_"),
627 MTK_FUNCTION(2, "I2S3_DO_1"),
628 MTK_FUNCTION(3, "PWM0"),
629 MTK_FUNCTION(4, "PWM5"),
630 MTK_FUNCTION(5, "I2S2_MCK"),
631 MTK_FUNCTION(7, "DBG_MON_B_19_")
632 ),
633 MTK_PIN(
634 PINCTRL_PIN(70, "SPI_MI"),
635 NULL, "mt8173",
636 MTK_EINT_FUNCTION(0, 70),
637 MTK_FUNCTION(0, "GPIO70"),
638 MTK_FUNCTION(1, "SPI_MI_0_"),
639 MTK_FUNCTION(2, "I2S3_DO_2"),
640 MTK_FUNCTION(3, "PWM1"),
641 MTK_FUNCTION(4, "SPI_MO_0_"),
642 MTK_FUNCTION(5, "I2S2_DI_1"),
643 MTK_FUNCTION(6, "DSI1_TE"),
644 MTK_FUNCTION(7, "DBG_MON_B_20_")
645 ),
646 MTK_PIN(
647 PINCTRL_PIN(71, "SPI_MO"),
648 NULL, "mt8173",
649 MTK_EINT_FUNCTION(0, 71),
650 MTK_FUNCTION(0, "GPIO71"),
651 MTK_FUNCTION(1, "SPI_MO_0_"),
652 MTK_FUNCTION(2, "I2S3_DO_3"),
653 MTK_FUNCTION(3, "PWM2"),
654 MTK_FUNCTION(4, "SPI_MI_0_"),
655 MTK_FUNCTION(5, "I2S2_DI_2"),
656 MTK_FUNCTION(7, "DBG_MON_B_21_")
657 ),
658 MTK_PIN(
659 PINCTRL_PIN(72, "SPI_CS"),
660 NULL, "mt8173",
661 MTK_EINT_FUNCTION(0, 72),
662 MTK_FUNCTION(0, "GPIO72"),
663 MTK_FUNCTION(1, "SPI_CS_0_"),
664 MTK_FUNCTION(2, "I2S3_DO_4"),
665 MTK_FUNCTION(3, "PWM3"),
666 MTK_FUNCTION(4, "PWM6"),
667 MTK_FUNCTION(5, "DISP_PWM1"),
668 MTK_FUNCTION(7, "DBG_MON_B_22_")
669 ),
670 MTK_PIN(
671 PINCTRL_PIN(73, "MSDC1_DAT0"),
672 NULL, "mt8173",
673 MTK_EINT_FUNCTION(0, 73),
674 MTK_FUNCTION(0, "GPIO73"),
675 MTK_FUNCTION(1, "MSDC1_DAT0"),
676 MTK_FUNCTION(7, "DBG_MON_B_24_")
677 ),
678 MTK_PIN(
679 PINCTRL_PIN(74, "MSDC1_DAT1"),
680 NULL, "mt8173",
681 MTK_EINT_FUNCTION(0, 74),
682 MTK_FUNCTION(0, "GPIO74"),
683 MTK_FUNCTION(1, "MSDC1_DAT1"),
684 MTK_FUNCTION(7, "DBG_MON_B_25_")
685 ),
686 MTK_PIN(
687 PINCTRL_PIN(75, "MSDC1_DAT2"),
688 NULL, "mt8173",
689 MTK_EINT_FUNCTION(0, 75),
690 MTK_FUNCTION(0, "GPIO75"),
691 MTK_FUNCTION(1, "MSDC1_DAT2"),
692 MTK_FUNCTION(7, "DBG_MON_B_26_")
693 ),
694 MTK_PIN(
695 PINCTRL_PIN(76, "MSDC1_DAT3"),
696 NULL, "mt8173",
697 MTK_EINT_FUNCTION(0, 76),
698 MTK_FUNCTION(0, "GPIO76"),
699 MTK_FUNCTION(1, "MSDC1_DAT3"),
700 MTK_FUNCTION(7, "DBG_MON_B_27_")
701 ),
702 MTK_PIN(
703 PINCTRL_PIN(77, "MSDC1_CLK"),
704 NULL, "mt8173",
705 MTK_EINT_FUNCTION(0, 77),
706 MTK_FUNCTION(0, "GPIO77"),
707 MTK_FUNCTION(1, "MSDC1_CLK"),
708 MTK_FUNCTION(7, "DBG_MON_B_28_")
709 ),
710 MTK_PIN(
711 PINCTRL_PIN(78, "MSDC1_CMD"),
712 NULL, "mt8173",
713 MTK_EINT_FUNCTION(0, 78),
714 MTK_FUNCTION(0, "GPIO78"),
715 MTK_FUNCTION(1, "MSDC1_CMD"),
716 MTK_FUNCTION(7, "DBG_MON_B_23_")
717 ),
718 MTK_PIN(
719 PINCTRL_PIN(79, "PWRAP_SPI0_MI"),
720 NULL, "mt8173",
721 MTK_EINT_FUNCTION(0, 79),
722 MTK_FUNCTION(0, "GPIO79"),
723 MTK_FUNCTION(1, "PWRAP_SPIMI"),
724 MTK_FUNCTION(2, "PWRAP_SPIMO")
725 ),
726 MTK_PIN(
727 PINCTRL_PIN(80, "PWRAP_SPI0_MO"),
728 NULL, "mt8173",
729 MTK_EINT_FUNCTION(0, 80),
730 MTK_FUNCTION(0, "GPIO80"),
731 MTK_FUNCTION(1, "PWRAP_SPIMO"),
732 MTK_FUNCTION(2, "PWRAP_SPIMI")
733 ),
734 MTK_PIN(
735 PINCTRL_PIN(81, "PWRAP_SPI0_CK"),
736 NULL, "mt8173",
737 MTK_EINT_FUNCTION(0, 81),
738 MTK_FUNCTION(0, "GPIO81"),
739 MTK_FUNCTION(1, "PWRAP_SPICK")
740 ),
741 MTK_PIN(
742 PINCTRL_PIN(82, "PWRAP_SPI0_CSN"),
743 NULL, "mt8173",
744 MTK_EINT_FUNCTION(0, 82),
745 MTK_FUNCTION(0, "GPIO82"),
746 MTK_FUNCTION(1, "PWRAP_SPICS")
747 ),
748 MTK_PIN(
749 PINCTRL_PIN(83, "AUD_CLK_MOSI"),
750 NULL, "mt8173",
751 MTK_EINT_FUNCTION(0, 83),
752 MTK_FUNCTION(0, "GPIO83"),
753 MTK_FUNCTION(1, "AUD_CLK_MOSI")
754 ),
755 MTK_PIN(
756 PINCTRL_PIN(84, "AUD_DAT_MISO"),
757 NULL, "mt8173",
758 MTK_EINT_FUNCTION(0, 84),
759 MTK_FUNCTION(0, "GPIO84"),
760 MTK_FUNCTION(1, "AUD_DAT_MISO"),
761 MTK_FUNCTION(2, "AUD_DAT_MOSI")
762 ),
763 MTK_PIN(
764 PINCTRL_PIN(85, "AUD_DAT_MOSI"),
765 NULL, "mt8173",
766 MTK_EINT_FUNCTION(0, 85),
767 MTK_FUNCTION(0, "GPIO85"),
768 MTK_FUNCTION(1, "AUD_DAT_MOSI"),
769 MTK_FUNCTION(2, "AUD_DAT_MISO")
770 ),
771 MTK_PIN(
772 PINCTRL_PIN(86, "RTC32K_CK"),
773 NULL, "mt8173",
774 MTK_EINT_FUNCTION(0, 86),
775 MTK_FUNCTION(0, "GPIO86"),
776 MTK_FUNCTION(1, "RTC32K_CK")
777 ),
778 MTK_PIN(
779 PINCTRL_PIN(87, "DISP_PWM0"),
780 NULL, "mt8173",
781 MTK_EINT_FUNCTION(0, 87),
782 MTK_FUNCTION(0, "GPIO87"),
783 MTK_FUNCTION(1, "DISP_PWM0"),
784 MTK_FUNCTION(2, "DISP_PWM1"),
785 MTK_FUNCTION(7, "DBG_MON_B_31_")
786 ),
787 MTK_PIN(
788 PINCTRL_PIN(88, "SRCLKENAI"),
789 NULL, "mt8173",
790 MTK_EINT_FUNCTION(0, 88),
791 MTK_FUNCTION(0, "GPIO88"),
792 MTK_FUNCTION(1, "SRCLKENAI")
793 ),
794 MTK_PIN(
795 PINCTRL_PIN(89, "SRCLKENAI2"),
796 NULL, "mt8173",
797 MTK_EINT_FUNCTION(0, 89),
798 MTK_FUNCTION(0, "GPIO89"),
799 MTK_FUNCTION(1, "SRCLKENAI2")
800 ),
801 MTK_PIN(
802 PINCTRL_PIN(90, "SRCLKENA0"),
803 NULL, "mt8173",
804 MTK_EINT_FUNCTION(0, 90),
805 MTK_FUNCTION(0, "GPIO90"),
806 MTK_FUNCTION(1, "SRCLKENA0")
807 ),
808 MTK_PIN(
809 PINCTRL_PIN(91, "SRCLKENA1"),
810 NULL, "mt8173",
811 MTK_EINT_FUNCTION(0, 91),
812 MTK_FUNCTION(0, "GPIO91"),
813 MTK_FUNCTION(1, "SRCLKENA1")
814 ),
815 MTK_PIN(
816 PINCTRL_PIN(92, "PCM_CLK"),
817 NULL, "mt8173",
818 MTK_EINT_FUNCTION(0, 92),
819 MTK_FUNCTION(0, "GPIO92"),
820 MTK_FUNCTION(1, "PCM1_CLK"),
821 MTK_FUNCTION(2, "I2S0_BCK"),
822 MTK_FUNCTION(7, "DBG_MON_A_24_")
823 ),
824 MTK_PIN(
825 PINCTRL_PIN(93, "PCM_SYNC"),
826 NULL, "mt8173",
827 MTK_EINT_FUNCTION(0, 93),
828 MTK_FUNCTION(0, "GPIO93"),
829 MTK_FUNCTION(1, "PCM1_SYNC"),
830 MTK_FUNCTION(2, "I2S0_WS"),
831 MTK_FUNCTION(7, "DBG_MON_A_25_")
832 ),
833 MTK_PIN(
834 PINCTRL_PIN(94, "PCM_RX"),
835 NULL, "mt8173",
836 MTK_EINT_FUNCTION(0, 94),
837 MTK_FUNCTION(0, "GPIO94"),
838 MTK_FUNCTION(1, "PCM1_DI"),
839 MTK_FUNCTION(2, "I2S0_DI"),
840 MTK_FUNCTION(7, "DBG_MON_A_26_")
841 ),
842 MTK_PIN(
843 PINCTRL_PIN(95, "PCM_TX"),
844 NULL, "mt8173",
845 MTK_EINT_FUNCTION(0, 95),
846 MTK_FUNCTION(0, "GPIO95"),
847 MTK_FUNCTION(1, "PCM1_DO"),
848 MTK_FUNCTION(2, "I2S0_DO"),
849 MTK_FUNCTION(7, "DBG_MON_A_27_")
850 ),
851 MTK_PIN(
852 PINCTRL_PIN(96, "URXD1"),
853 NULL, "mt8173",
854 MTK_EINT_FUNCTION(0, 96),
855 MTK_FUNCTION(0, "GPIO96"),
856 MTK_FUNCTION(1, "URXD1"),
857 MTK_FUNCTION(2, "UTXD1"),
858 MTK_FUNCTION(7, "DBG_MON_A_28_")
859 ),
860 MTK_PIN(
861 PINCTRL_PIN(97, "UTXD1"),
862 NULL, "mt8173",
863 MTK_EINT_FUNCTION(0, 97),
864 MTK_FUNCTION(0, "GPIO97"),
865 MTK_FUNCTION(1, "UTXD1"),
866 MTK_FUNCTION(2, "URXD1"),
867 MTK_FUNCTION(7, "DBG_MON_A_29_")
868 ),
869 MTK_PIN(
870 PINCTRL_PIN(98, "URTS1"),
871 NULL, "mt8173",
872 MTK_EINT_FUNCTION(0, 98),
873 MTK_FUNCTION(0, "GPIO98"),
874 MTK_FUNCTION(1, "URTS1"),
875 MTK_FUNCTION(2, "UCTS1"),
876 MTK_FUNCTION(7, "DBG_MON_A_30_")
877 ),
878 MTK_PIN(
879 PINCTRL_PIN(99, "UCTS1"),
880 NULL, "mt8173",
881 MTK_EINT_FUNCTION(0, 99),
882 MTK_FUNCTION(0, "GPIO99"),
883 MTK_FUNCTION(1, "UCTS1"),
884 MTK_FUNCTION(2, "URTS1"),
885 MTK_FUNCTION(7, "DBG_MON_A_31_")
886 ),
887 MTK_PIN(
888 PINCTRL_PIN(100, "MSDC2_DAT0"),
889 NULL, "mt8173",
890 MTK_EINT_FUNCTION(0, 100),
891 MTK_FUNCTION(0, "GPIO100"),
892 MTK_FUNCTION(1, "MSDC2_DAT0"),
893 MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
894 MTK_FUNCTION(4, "SDA5"),
895 MTK_FUNCTION(5, "USB_DRVVBUS_P1"),
896 MTK_FUNCTION(7, "DBG_MON_B_0_")
897 ),
898 MTK_PIN(
899 PINCTRL_PIN(101, "MSDC2_DAT1"),
900 NULL, "mt8173",
901 MTK_EINT_FUNCTION(0, 101),
902 MTK_FUNCTION(0, "GPIO101"),
903 MTK_FUNCTION(1, "MSDC2_DAT1"),
904 MTK_FUNCTION(3, "AUD_SPDIF"),
905 MTK_FUNCTION(4, "SCL5"),
906 MTK_FUNCTION(7, "DBG_MON_B_1_")
907 ),
908 MTK_PIN(
909 PINCTRL_PIN(102, "MSDC2_DAT2"),
910 NULL, "mt8173",
911 MTK_EINT_FUNCTION(0, 102),
912 MTK_FUNCTION(0, "GPIO102"),
913 MTK_FUNCTION(1, "MSDC2_DAT2"),
914 MTK_FUNCTION(3, "UTXD0"),
915 MTK_FUNCTION(5, "PWM0"),
916 MTK_FUNCTION(6, "SPI_CK_1_"),
917 MTK_FUNCTION(7, "DBG_MON_B_2_")
918 ),
919 MTK_PIN(
920 PINCTRL_PIN(103, "MSDC2_DAT3"),
921 NULL, "mt8173",
922 MTK_EINT_FUNCTION(0, 103),
923 MTK_FUNCTION(0, "GPIO103"),
924 MTK_FUNCTION(1, "MSDC2_DAT3"),
925 MTK_FUNCTION(3, "URXD0"),
926 MTK_FUNCTION(5, "PWM1"),
927 MTK_FUNCTION(6, "SPI_MI_1_"),
928 MTK_FUNCTION(7, "DBG_MON_B_3_")
929 ),
930 MTK_PIN(
931 PINCTRL_PIN(104, "MSDC2_CLK"),
932 NULL, "mt8173",
933 MTK_EINT_FUNCTION(0, 104),
934 MTK_FUNCTION(0, "GPIO104"),
935 MTK_FUNCTION(1, "MSDC2_CLK"),
936 MTK_FUNCTION(3, "UTXD3"),
937 MTK_FUNCTION(4, "SDA3"),
938 MTK_FUNCTION(5, "PWM2"),
939 MTK_FUNCTION(6, "SPI_MO_1_"),
940 MTK_FUNCTION(7, "DBG_MON_B_4_")
941 ),
942 MTK_PIN(
943 PINCTRL_PIN(105, "MSDC2_CMD"),
944 NULL, "mt8173",
945 MTK_EINT_FUNCTION(0, 105),
946 MTK_FUNCTION(0, "GPIO105"),
947 MTK_FUNCTION(1, "MSDC2_CMD"),
948 MTK_FUNCTION(3, "URXD3"),
949 MTK_FUNCTION(4, "SCL3"),
950 MTK_FUNCTION(5, "PWM3"),
951 MTK_FUNCTION(6, "SPI_CS_1_"),
952 MTK_FUNCTION(7, "DBG_MON_B_5_")
953 ),
954 MTK_PIN(
955 PINCTRL_PIN(106, "SDA3"),
956 NULL, "mt8173",
957 MTK_EINT_FUNCTION(0, 106),
958 MTK_FUNCTION(0, "GPIO106"),
959 MTK_FUNCTION(1, "SDA3")
960 ),
961 MTK_PIN(
962 PINCTRL_PIN(107, "SCL3"),
963 NULL, "mt8173",
964 MTK_EINT_FUNCTION(0, 107),
965 MTK_FUNCTION(0, "GPIO107"),
966 MTK_FUNCTION(1, "SCL3")
967 ),
968 MTK_PIN(
969 PINCTRL_PIN(108, "JTMS"),
970 NULL, "mt8173",
971 MTK_EINT_FUNCTION(0, 108),
972 MTK_FUNCTION(0, "GPIO108"),
973 MTK_FUNCTION(1, "JTMS"),
974 MTK_FUNCTION(2, " MFG_JTAG_TMS"),
975 MTK_FUNCTION(5, "AP_MD32_JTAG_TMS"),
976 MTK_FUNCTION(6, "DFD_TMS")
977 ),
978 MTK_PIN(
979 PINCTRL_PIN(109, "JTCK"),
980 NULL, "mt8173",
981 MTK_EINT_FUNCTION(0, 109),
982 MTK_FUNCTION(0, "GPIO109"),
983 MTK_FUNCTION(1, "JTCK"),
984 MTK_FUNCTION(2, " MFG_JTAG_TCK"),
985 MTK_FUNCTION(5, "AP_MD32_JTAG_TCK"),
986 MTK_FUNCTION(6, "DFD_TCK")
987 ),
988 MTK_PIN(
989 PINCTRL_PIN(110, "JTDI"),
990 NULL, "mt8173",
991 MTK_EINT_FUNCTION(0, 110),
992 MTK_FUNCTION(0, "GPIO110"),
993 MTK_FUNCTION(1, "JTDI"),
994 MTK_FUNCTION(2, " MFG_JTAG_TDI"),
995 MTK_FUNCTION(5, "AP_MD32_JTAG_TDI"),
996 MTK_FUNCTION(6, "DFD_TDI")
997 ),
998 MTK_PIN(
999 PINCTRL_PIN(111, "JTDO"),
1000 NULL, "mt8173",
1001 MTK_EINT_FUNCTION(0, 111),
1002 MTK_FUNCTION(0, "GPIO111"),
1003 MTK_FUNCTION(1, "JTDO"),
1004 MTK_FUNCTION(2, "MFG_JTAG_TDO"),
1005 MTK_FUNCTION(5, "AP_MD32_JTAG_TDO"),
1006 MTK_FUNCTION(6, "DFD_TDO")
1007 ),
1008 MTK_PIN(
1009 PINCTRL_PIN(112, "JTRST_B"),
1010 NULL, "mt8173",
1011 MTK_EINT_FUNCTION(0, 112),
1012 MTK_FUNCTION(0, "GPIO112"),
1013 MTK_FUNCTION(1, "JTRST_B"),
1014 MTK_FUNCTION(2, " MFG_JTAG_TRSTN"),
1015 MTK_FUNCTION(5, "AP_MD32_JTAG_TRST"),
1016 MTK_FUNCTION(6, "DFD_NTRST")
1017 ),
1018 MTK_PIN(
1019 PINCTRL_PIN(113, "URXD0"),
1020 NULL, "mt8173",
1021 MTK_EINT_FUNCTION(0, 113),
1022 MTK_FUNCTION(0, "GPIO113"),
1023 MTK_FUNCTION(1, "URXD0"),
1024 MTK_FUNCTION(2, "UTXD0"),
1025 MTK_FUNCTION(6, "I2S2_WS"),
1026 MTK_FUNCTION(7, "DBG_MON_A_0_")
1027 ),
1028 MTK_PIN(
1029 PINCTRL_PIN(114, "UTXD0"),
1030 NULL, "mt8173",
1031 MTK_EINT_FUNCTION(0, 114),
1032 MTK_FUNCTION(0, "GPIO114"),
1033 MTK_FUNCTION(1, "UTXD0"),
1034 MTK_FUNCTION(2, "URXD0"),
1035 MTK_FUNCTION(6, "I2S2_BCK"),
1036 MTK_FUNCTION(7, "DBG_MON_A_1_")
1037 ),
1038 MTK_PIN(
1039 PINCTRL_PIN(115, "URTS0"),
1040 NULL, "mt8173",
1041 MTK_EINT_FUNCTION(0, 115),
1042 MTK_FUNCTION(0, "GPIO115"),
1043 MTK_FUNCTION(1, "URTS0"),
1044 MTK_FUNCTION(2, "UCTS0"),
1045 MTK_FUNCTION(6, "I2S2_MCK"),
1046 MTK_FUNCTION(7, "DBG_MON_A_2_")
1047 ),
1048 MTK_PIN(
1049 PINCTRL_PIN(116, "UCTS0"),
1050 NULL, "mt8173",
1051 MTK_EINT_FUNCTION(0, 116),
1052 MTK_FUNCTION(0, "GPIO116"),
1053 MTK_FUNCTION(1, "UCTS0"),
1054 MTK_FUNCTION(2, "URTS0"),
1055 MTK_FUNCTION(6, "I2S2_DI_1"),
1056 MTK_FUNCTION(7, "DBG_MON_A_3_")
1057 ),
1058 MTK_PIN(
1059 PINCTRL_PIN(117, "URXD3"),
1060 NULL, "mt8173",
1061 MTK_EINT_FUNCTION(0, 117),
1062 MTK_FUNCTION(0, "GPIO117"),
1063 MTK_FUNCTION(1, "URXD3"),
1064 MTK_FUNCTION(2, "UTXD3"),
1065 MTK_FUNCTION(7, "DBG_MON_A_9_")
1066 ),
1067 MTK_PIN(
1068 PINCTRL_PIN(118, "UTXD3"),
1069 NULL, "mt8173",
1070 MTK_EINT_FUNCTION(0, 118),
1071 MTK_FUNCTION(0, "GPIO118"),
1072 MTK_FUNCTION(1, "UTXD3"),
1073 MTK_FUNCTION(2, "URXD3"),
1074 MTK_FUNCTION(7, "DBG_MON_A_10_")
1075 ),
1076 MTK_PIN(
1077 PINCTRL_PIN(119, "KPROW0"),
1078 NULL, "mt8173",
1079 MTK_EINT_FUNCTION(0, 119),
1080 MTK_FUNCTION(0, "GPIO119"),
1081 MTK_FUNCTION(1, "KROW0"),
1082 MTK_FUNCTION(7, "DBG_MON_A_11_")
1083 ),
1084 MTK_PIN(
1085 PINCTRL_PIN(120, "KPROW1"),
1086 NULL, "mt8173",
1087 MTK_EINT_FUNCTION(0, 120),
1088 MTK_FUNCTION(0, "GPIO120"),
1089 MTK_FUNCTION(1, "KROW1"),
1090 MTK_FUNCTION(3, "PWM6"),
1091 MTK_FUNCTION(7, "DBG_MON_A_12_")
1092 ),
1093 MTK_PIN(
1094 PINCTRL_PIN(121, "KPROW2"),
1095 NULL, "mt8173",
1096 MTK_EINT_FUNCTION(0, 121),
1097 MTK_FUNCTION(0, "GPIO121"),
1098 MTK_FUNCTION(1, "KROW2"),
1099 MTK_FUNCTION(2, "IRDA_PDN"),
1100 MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
1101 MTK_FUNCTION(4, "PWM4"),
1102 MTK_FUNCTION(5, "USB_DRVVBUS_P1"),
1103 MTK_FUNCTION(7, "DBG_MON_A_13_")
1104 ),
1105 MTK_PIN(
1106 PINCTRL_PIN(122, "KPCOL0"),
1107 NULL, "mt8173",
1108 MTK_EINT_FUNCTION(0, 122),
1109 MTK_FUNCTION(0, "GPIO122"),
1110 MTK_FUNCTION(1, "KCOL0"),
1111 MTK_FUNCTION(7, "DBG_MON_A_14_")
1112 ),
1113 MTK_PIN(
1114 PINCTRL_PIN(123, "KPCOL1"),
1115 NULL, "mt8173",
1116 MTK_EINT_FUNCTION(0, 123),
1117 MTK_FUNCTION(0, "GPIO123"),
1118 MTK_FUNCTION(1, "KCOL1"),
1119 MTK_FUNCTION(2, "IRDA_RXD"),
1120 MTK_FUNCTION(3, "PWM5"),
1121 MTK_FUNCTION(7, "DBG_MON_A_15_")
1122 ),
1123 MTK_PIN(
1124 PINCTRL_PIN(124, "KPCOL2"),
1125 NULL, "mt8173",
1126 MTK_EINT_FUNCTION(0, 124),
1127 MTK_FUNCTION(0, "GPIO124"),
1128 MTK_FUNCTION(1, "KCOL2"),
1129 MTK_FUNCTION(2, "IRDA_TXD"),
1130 MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
1131 MTK_FUNCTION(4, "PWM3"),
1132 MTK_FUNCTION(5, "USB_DRVVBUS_P1"),
1133 MTK_FUNCTION(7, "DBG_MON_A_16_")
1134 ),
1135 MTK_PIN(
1136 PINCTRL_PIN(125, "SDA1"),
1137 NULL, "mt8173",
1138 MTK_EINT_FUNCTION(0, 125),
1139 MTK_FUNCTION(0, "GPIO125"),
1140 MTK_FUNCTION(1, "SDA1")
1141 ),
1142 MTK_PIN(
1143 PINCTRL_PIN(126, "SCL1"),
1144 NULL, "mt8173",
1145 MTK_EINT_FUNCTION(0, 126),
1146 MTK_FUNCTION(0, "GPIO126"),
1147 MTK_FUNCTION(1, "SCL1")
1148 ),
1149 MTK_PIN(
1150 PINCTRL_PIN(127, "LCM_RST"),
1151 NULL, "mt8173",
1152 MTK_EINT_FUNCTION(0, 127),
1153 MTK_FUNCTION(0, "GPIO127"),
1154 MTK_FUNCTION(1, "LCM_RST")
1155 ),
1156 MTK_PIN(
1157 PINCTRL_PIN(128, "I2S0_LRCK"),
1158 NULL, "mt8173",
1159 MTK_EINT_FUNCTION(0, 128),
1160 MTK_FUNCTION(0, "GPIO128"),
1161 MTK_FUNCTION(1, "I2S0_WS"),
1162 MTK_FUNCTION(2, "I2S1_WS"),
1163 MTK_FUNCTION(3, "I2S2_WS"),
1164 MTK_FUNCTION(5, "SPI_CK_2_"),
1165 MTK_FUNCTION(7, "DBG_MON_A_4_")
1166 ),
1167 MTK_PIN(
1168 PINCTRL_PIN(129, "I2S0_BCK"),
1169 NULL, "mt8173",
1170 MTK_EINT_FUNCTION(0, 129),
1171 MTK_FUNCTION(0, "GPIO129"),
1172 MTK_FUNCTION(1, "I2S0_BCK"),
1173 MTK_FUNCTION(2, "I2S1_BCK"),
1174 MTK_FUNCTION(3, "I2S2_BCK"),
1175 MTK_FUNCTION(5, "SPI_MI_2_"),
1176 MTK_FUNCTION(7, "DBG_MON_A_5_")
1177 ),
1178 MTK_PIN(
1179 PINCTRL_PIN(130, "I2S0_MCK"),
1180 NULL, "mt8173",
1181 MTK_EINT_FUNCTION(0, 130),
1182 MTK_FUNCTION(0, "GPIO130"),
1183 MTK_FUNCTION(1, "I2S0_MCK"),
1184 MTK_FUNCTION(2, "I2S1_MCK"),
1185 MTK_FUNCTION(3, "I2S2_MCK"),
1186 MTK_FUNCTION(5, "SPI_MO_2_"),
1187 MTK_FUNCTION(7, "DBG_MON_A_6_")
1188 ),
1189 MTK_PIN(
1190 PINCTRL_PIN(131, "I2S0_DATA0"),
1191 NULL, "mt8173",
1192 MTK_EINT_FUNCTION(0, 131),
1193 MTK_FUNCTION(0, "GPIO131"),
1194 MTK_FUNCTION(1, "I2S0_DO"),
1195 MTK_FUNCTION(2, "I2S1_DO_1"),
1196 MTK_FUNCTION(3, "I2S2_DI_1"),
1197 MTK_FUNCTION(5, "SPI_CS_2_"),
1198 MTK_FUNCTION(7, "DBG_MON_A_7_")
1199 ),
1200 MTK_PIN(
1201 PINCTRL_PIN(132, "I2S0_DATA1"),
1202 NULL, "mt8173",
1203 MTK_EINT_FUNCTION(0, 132),
1204 MTK_FUNCTION(0, "GPIO132"),
1205 MTK_FUNCTION(1, "I2S0_DI"),
1206 MTK_FUNCTION(2, "I2S1_DO_2"),
1207 MTK_FUNCTION(3, "I2S2_DI_2"),
1208 MTK_FUNCTION(7, "DBG_MON_A_8_")
1209 ),
1210 MTK_PIN(
1211 PINCTRL_PIN(133, "SDA4"),
1212 NULL, "mt8173",
1213 MTK_EINT_FUNCTION(0, 133),
1214 MTK_FUNCTION(0, "GPIO133"),
1215 MTK_FUNCTION(1, "SDA4")
1216 ),
1217 MTK_PIN(
1218 PINCTRL_PIN(134, "SCL4"),
1219 NULL, "mt8173",
1220 MTK_EINT_FUNCTION(0, 134),
1221 MTK_FUNCTION(0, "GPIO134"),
1222 MTK_FUNCTION(1, "SCL4")
1223 ),
1224};
1225
1226#endif /* __PINCTRL_MTK_MT8173_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-15 13:49:33 -0400