diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/mm')
-rw-r--r-- | drivers/gpu/nvgpu/common/mm/gmmu.c | 16 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/mm/nvgpu_mem.c | 47 |
2 files changed, 1 insertions, 62 deletions
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c index 3b57e781..e1942cbd 100644 --- a/drivers/gpu/nvgpu/common/mm/gmmu.c +++ b/drivers/gpu/nvgpu/common/mm/gmmu.c | |||
@@ -79,13 +79,6 @@ static u64 __nvgpu_gmmu_map(struct vm_gk20a *vm, | |||
79 | if (!sgt) | 79 | if (!sgt) |
80 | return -ENOMEM; | 80 | return -ENOMEM; |
81 | 81 | ||
82 | /* | ||
83 | * If the GPU is IO coherent and the DMA API is giving us IO coherent | ||
84 | * CPU mappings then we gotta make sure we use the IO coherent aperture. | ||
85 | */ | ||
86 | if (nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM)) | ||
87 | flags |= NVGPU_VM_MAP_IO_COHERENT; | ||
88 | |||
89 | nvgpu_mutex_acquire(&vm->update_gmmu_lock); | 82 | nvgpu_mutex_acquire(&vm->update_gmmu_lock); |
90 | vaddr = g->ops.mm.gmmu_map(vm, addr, | 83 | vaddr = g->ops.mm.gmmu_map(vm, addr, |
91 | sgt, /* sg list */ | 84 | sgt, /* sg list */ |
@@ -634,7 +627,7 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm, | |||
634 | page_size >> 10, | 627 | page_size >> 10, |
635 | nvgpu_gmmu_perm_str(attrs->rw_flag), | 628 | nvgpu_gmmu_perm_str(attrs->rw_flag), |
636 | attrs->kind_v, | 629 | attrs->kind_v, |
637 | nvgpu_aperture_str(g, attrs->aperture), | 630 | nvgpu_aperture_str(attrs->aperture), |
638 | attrs->cacheable ? 'C' : '-', | 631 | attrs->cacheable ? 'C' : '-', |
639 | attrs->sparse ? 'S' : '-', | 632 | attrs->sparse ? 'S' : '-', |
640 | attrs->priv ? 'P' : '-', | 633 | attrs->priv ? 'P' : '-', |
@@ -712,13 +705,6 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm, | |||
712 | attrs.l3_alloc = (bool)(flags & NVGPU_VM_MAP_L3_ALLOC); | 705 | attrs.l3_alloc = (bool)(flags & NVGPU_VM_MAP_L3_ALLOC); |
713 | 706 | ||
714 | /* | 707 | /* |
715 | * Handle the IO coherency aperture: make sure the .aperture field is | ||
716 | * correct based on the IO coherency flag. | ||
717 | */ | ||
718 | if (attrs.coherent && attrs.aperture == APERTURE_SYSMEM) | ||
719 | attrs.aperture = __APERTURE_SYSMEM_COH; | ||
720 | |||
721 | /* | ||
722 | * Only allocate a new GPU VA range if we haven't already been passed a | 708 | * Only allocate a new GPU VA range if we haven't already been passed a |
723 | * GPU VA range. This facilitates fixed mappings. | 709 | * GPU VA range. This facilitates fixed mappings. |
724 | */ | 710 | */ |
diff --git a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c index 2b32d869..f7c51f42 100644 --- a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c | |||
@@ -28,53 +28,6 @@ | |||
28 | 28 | ||
29 | #include "gk20a/gk20a.h" | 29 | #include "gk20a/gk20a.h" |
30 | 30 | ||
31 | /* | ||
32 | * Make sure to use the right coherency aperture if you use this function! This | ||
33 | * will not add any checks. If you want to simply use the default coherency then | ||
34 | * use nvgpu_aperture_mask(). | ||
35 | */ | ||
36 | u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture, | ||
37 | u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask) | ||
38 | { | ||
39 | /* | ||
40 | * Some iGPUs treat sysmem (i.e SoC DRAM) as vidmem. In these cases the | ||
41 | * "sysmem" aperture should really be translated to VIDMEM. | ||
42 | */ | ||
43 | if (!nvgpu_is_enabled(g, NVGPU_MM_HONORS_APERTURE)) | ||
44 | aperture = APERTURE_VIDMEM; | ||
45 | |||
46 | switch (aperture) { | ||
47 | case __APERTURE_SYSMEM_COH: | ||
48 | return sysmem_coh_mask; | ||
49 | case APERTURE_SYSMEM: | ||
50 | return sysmem_mask; | ||
51 | case APERTURE_VIDMEM: | ||
52 | return vidmem_mask; | ||
53 | case APERTURE_INVALID: | ||
54 | WARN_ON("Bad aperture"); | ||
55 | } | ||
56 | return 0; | ||
57 | } | ||
58 | |||
59 | u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, | ||
60 | u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask) | ||
61 | { | ||
62 | enum nvgpu_aperture ap = mem->aperture; | ||
63 | |||
64 | /* | ||
65 | * Handle the coherent aperture: ideally most of the driver is not | ||
66 | * aware of the difference between coherent and non-coherent sysmem so | ||
67 | * we add this translation step here. | ||
68 | */ | ||
69 | if (nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM) && | ||
70 | ap == APERTURE_SYSMEM) | ||
71 | ap = __APERTURE_SYSMEM_COH; | ||
72 | |||
73 | return __nvgpu_aperture_mask(g, ap, | ||
74 | sysmem_mask, sysmem_coh_mask, vidmem_mask); | ||
75 | } | ||
76 | |||
77 | |||
78 | struct nvgpu_sgl *nvgpu_sgt_get_next(struct nvgpu_sgt *sgt, | 31 | struct nvgpu_sgl *nvgpu_sgt_get_next(struct nvgpu_sgt *sgt, |
79 | struct nvgpu_sgl *sgl) | 32 | struct nvgpu_sgl *sgl) |
80 | { | 33 | { |