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-rw-r--r--drivers/gpu/nvgpu/gv11b/gr_gv11b.c25
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h8
2 files changed, 18 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index 5b1b41ce..6ac0c44f 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -1389,8 +1389,11 @@ static int gr_gv11b_dump_gr_sm_regs(struct gk20a *g,
1389 "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x%x\n", 1389 "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x%x\n",
1390 gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_status0_r())); 1390 gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_status0_r()));
1391 gk20a_debug_output(o, 1391 gk20a_debug_output(o,
1392 "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK: 0x%x\n", 1392 "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x%x\n",
1393 gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_r())); 1393 gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_0_r()));
1394 gk20a_debug_output(o,
1395 "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x%x\n",
1396 gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_1_r()));
1394 1397
1395 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); 1398 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC);
1396 for (gpc = 0; gpc < g->gr.gpc_count; gpc++) { 1399 for (gpc = 0; gpc < g->gr.gpc_count; gpc++) {
@@ -2483,26 +2486,26 @@ static void gv11b_gr_bpt_reg_info(struct gk20a *g, struct warpstate *w_state)
2483 2486
2484 /* 64 bit read */ 2487 /* 64 bit read */
2485 warps_valid = (u64)gk20a_readl(g, 2488 warps_valid = (u64)gk20a_readl(g,
2486 gr_gpc0_tpc0_sm0_warp_valid_mask_r() + 2489 gr_gpc0_tpc0_sm0_warp_valid_mask_1_r() +
2487 offset + 4) << 32; 2490 offset) << 32;
2488 warps_valid |= gk20a_readl(g, 2491 warps_valid |= gk20a_readl(g,
2489 gr_gpc0_tpc0_sm0_warp_valid_mask_r() + 2492 gr_gpc0_tpc0_sm0_warp_valid_mask_0_r() +
2490 offset); 2493 offset);
2491 2494
2492 /* 64 bit read */ 2495 /* 64 bit read */
2493 warps_paused = (u64)gk20a_readl(g, 2496 warps_paused = (u64)gk20a_readl(g,
2494 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_r() + 2497 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_1_r() +
2495 offset + 4) << 32; 2498 offset) << 32;
2496 warps_paused |= gk20a_readl(g, 2499 warps_paused |= gk20a_readl(g,
2497 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_r() + 2500 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_0_r() +
2498 offset); 2501 offset);
2499 2502
2500 /* 64 bit read */ 2503 /* 64 bit read */
2501 warps_trapped = (u64)gk20a_readl(g, 2504 warps_trapped = (u64)gk20a_readl(g,
2502 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_r() + 2505 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_1_r() +
2503 offset + 4) << 32; 2506 offset) << 32;
2504 warps_trapped |= gk20a_readl(g, 2507 warps_trapped |= gk20a_readl(g,
2505 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_r() + 2508 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_0_r() +
2506 offset); 2509 offset);
2507 2510
2508 w_state[sm_id].valid_warps[0] = warps_valid; 2511 w_state[sm_id].valid_warps[0] = warps_valid;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
index daa4c08a..051961d2 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
@@ -3674,7 +3674,7 @@ static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_run_trigger_task_f(void)
3674{ 3674{
3675 return 0x40000000; 3675 return 0x40000000;
3676} 3676}
3677static inline u32 gr_gpc0_tpc0_sm0_warp_valid_mask_r(void) 3677static inline u32 gr_gpc0_tpc0_sm0_warp_valid_mask_0_r(void)
3678{ 3678{
3679 return 0x00504708; 3679 return 0x00504708;
3680} 3680}
@@ -3682,7 +3682,7 @@ static inline u32 gr_gpc0_tpc0_sm0_warp_valid_mask_1_r(void)
3682{ 3682{
3683 return 0x0050470c; 3683 return 0x0050470c;
3684} 3684}
3685static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_r(void) 3685static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_0_r(void)
3686{ 3686{
3687 return 0x00504710; 3687 return 0x00504710;
3688} 3688}
@@ -3690,7 +3690,7 @@ static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_1_r(void)
3690{ 3690{
3691 return 0x00504714; 3691 return 0x00504714;
3692} 3692}
3693static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_r(void) 3693static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_0_r(void)
3694{ 3694{
3695 return 0x00504718; 3695 return 0x00504718;
3696} 3696}
@@ -3698,7 +3698,7 @@ static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_1_r(void)
3698{ 3698{
3699 return 0x0050471c; 3699 return 0x0050471c;
3700} 3700}
3701static inline u32 gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_r(void) 3701static inline u32 gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_0_r(void)
3702{ 3702{
3703 return 0x00419e90; 3703 return 0x00419e90;
3704} 3704}