gpu: nvgpu: enable HWPM Mode-E context switch

- Write new pm mode to context buffer header. Ucode use
this mode to enable mode-e context switch. This is Mode-B
context switch of PMs with Mode-E streamout on one context.
If this mode is set, Ucode makes sure that Mode-E pipe
(perfmons, routers, pma) is idle before it context switches PMs.
- This allows us to collect counters in a secure way
(i.e. on context basis) with stream out.

Bug 2106999

Change-Id: I5a7435f09d1bf053ca428e538b0a57f3a175ac37
Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1760366
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.h b/drivers/gpu/nvgpu/vgpu/gr_vgpu.h
index c4b3944e..149bd17a 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.h
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.h
@@ -58,7 +58,7 @@ int vgpu_gr_set_sm_debug_mode(struct gk20a *g,
 int vgpu_gr_update_smpc_ctxsw_mode(struct gk20a *g,
         struct channel_gk20a *ch, bool enable);
 int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g,
-        struct channel_gk20a *ch, u64 gpu_va, bool enable);
+        struct channel_gk20a *ch, u64 gpu_va, u32 mode);
 int vgpu_gr_clear_sm_error_state(struct gk20a *g,
                 struct channel_gk20a *ch, u32 sm_id);
 int vgpu_gr_suspend_contexts(struct gk20a *g,