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authorPeter Daifuku <pdaifuku@nvidia.com>2017-10-06 19:27:14 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-13 18:20:18 -0400
commit57fb527a7e33384341fc18f1f918d5a8225057f5 (patch)
tree23bb49f879ac495834237c99564f0589d637f07e /drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h
parent3d343c9eeaa3415851d1c71b8815eb7dc2677b5a (diff)
gpu: nvgpu: vgpu: flatten out vgpu hal
Instead of calling the native HAL init function then adding multiple layers of modification for VGPU, flatten out the sequence so that all entry points are set statically and visible in a single file. JIRA ESRM-30 Change-Id: Ie424abb48bce5038874851d399baac5e4bb7d27c Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1574616 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h')
-rw-r--r--drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h19
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h
index 9505749e..baf5a8e9 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,21 @@
25 25
26#include "gk20a/gk20a.h" 26#include "gk20a/gk20a.h"
27 27
28void vgpu_gp10b_init_gr_ops(struct gpu_ops *gops); 28void vgpu_gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
29 struct gr_ctx_desc *gr_ctx);
30int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g,
31 struct gr_ctx_desc **__gr_ctx,
32 struct vm_gk20a *vm,
33 u32 class,
34 u32 flags);
35int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g,
36 struct gr_ctx_desc *gr_ctx,
37 struct vm_gk20a *vm, u32 class,
38 u32 graphics_preempt_mode,
39 u32 compute_preempt_mode);
40int vgpu_gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
41 u32 graphics_preempt_mode,
42 u32 compute_preempt_mode);
43int vgpu_gr_gp10b_init_ctx_state(struct gk20a *g);
29 44
30#endif 45#endif