diff options
author | Amulya <Amurthyreddy@nvidia.com> | 2018-08-14 01:00:46 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-28 13:33:52 -0400 |
commit | 06f54be8c979720515d22e24cb4a20868af45f59 (patch) | |
tree | ac7ae4b02ef859586170b33d0106910c9f3e8b2b /drivers/gpu/nvgpu/include | |
parent | 361eca66b58051d46daad1b600eef1f72b7f15c0 (diff) |
gpu: nvgpu: Fix MISRA 10.1-Using boolean as a bit
Fix violations where a boolean is used as an operand in bit-shift
operations and is interpreted as a numerical value.
JIRA NVGPU-649
Change-Id: I4494c3b69d0e53319331b47d0a4de0b3de279f4f
Signed-off-by: Amulya <Amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1799322
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Amulya Murthyreddy <amurthyreddy@nvidia.com>
Reviewed-by: Amulya Murthyreddy <amurthyreddy@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
6 files changed, 30 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h index 27fb5884..7b4d87b0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -336,6 +336,10 @@ static inline u32 falcon_falcon_imemc_aincw_f(u32 v) | |||
336 | { | 336 | { |
337 | return (v & 0x1U) << 24U; | 337 | return (v & 0x1U) << 24U; |
338 | } | 338 | } |
339 | static inline u32 falcon_falcon_imemc_secure_f(u32 v) | ||
340 | { | ||
341 | return (v & 0x1U) << 28U; | ||
342 | } | ||
339 | static inline u32 falcon_falcon_imemd_r(u32 i) | 343 | static inline u32 falcon_falcon_imemd_r(u32 i) |
340 | { | 344 | { |
341 | return 0x00000184U + i*16U; | 345 | return 0x00000184U + i*16U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h index a17c9a9a..c5985685 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -356,6 +356,10 @@ static inline u32 falcon_falcon_imemc_aincw_f(u32 v) | |||
356 | { | 356 | { |
357 | return (v & 0x1U) << 24U; | 357 | return (v & 0x1U) << 24U; |
358 | } | 358 | } |
359 | static inline u32 falcon_falcon_imemc_secure_f(u32 v) | ||
360 | { | ||
361 | return (v & 0x1U) << 28U; | ||
362 | } | ||
359 | static inline u32 falcon_falcon_imemd_r(u32 i) | 363 | static inline u32 falcon_falcon_imemd_r(u32 i) |
360 | { | 364 | { |
361 | return 0x00000184U + i*16U; | 365 | return 0x00000184U + i*16U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h index 6740b2a6..d899e3f3 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -356,6 +356,10 @@ static inline u32 falcon_falcon_imemc_aincw_f(u32 v) | |||
356 | { | 356 | { |
357 | return (v & 0x1U) << 24U; | 357 | return (v & 0x1U) << 24U; |
358 | } | 358 | } |
359 | static inline u32 falcon_falcon_imemc_secure_f(u32 v) | ||
360 | { | ||
361 | return (v & 0x1U) << 28U; | ||
362 | } | ||
359 | static inline u32 falcon_falcon_imemd_r(u32 i) | 363 | static inline u32 falcon_falcon_imemd_r(u32 i) |
360 | { | 364 | { |
361 | return 0x00000184U + i*16U; | 365 | return 0x00000184U + i*16U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h index 918f262b..6dc401d6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -356,6 +356,10 @@ static inline u32 falcon_falcon_imemc_aincw_f(u32 v) | |||
356 | { | 356 | { |
357 | return (v & 0x1U) << 24U; | 357 | return (v & 0x1U) << 24U; |
358 | } | 358 | } |
359 | static inline u32 falcon_falcon_imemc_secure_f(u32 v) | ||
360 | { | ||
361 | return (v & 0x1U) << 28U; | ||
362 | } | ||
359 | static inline u32 falcon_falcon_imemd_r(u32 i) | 363 | static inline u32 falcon_falcon_imemd_r(u32 i) |
360 | { | 364 | { |
361 | return 0x00000184U + i*16U; | 365 | return 0x00000184U + i*16U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_falcon_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_falcon_gv100.h index 122956bb..3492d68c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_falcon_gv100.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_falcon_gv100.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -356,6 +356,10 @@ static inline u32 falcon_falcon_imemc_aincw_f(u32 v) | |||
356 | { | 356 | { |
357 | return (v & 0x1U) << 24U; | 357 | return (v & 0x1U) << 24U; |
358 | } | 358 | } |
359 | static inline u32 falcon_falcon_imemc_secure_f(u32 v) | ||
360 | { | ||
361 | return (v & 0x1U) << 28U; | ||
362 | } | ||
359 | static inline u32 falcon_falcon_imemd_r(u32 i) | 363 | static inline u32 falcon_falcon_imemd_r(u32 i) |
360 | { | 364 | { |
361 | return 0x00000184U + i*16U; | 365 | return 0x00000184U + i*16U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_falcon_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_falcon_gv11b.h index 4bb8f2de..31e883e5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_falcon_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_falcon_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -356,6 +356,10 @@ static inline u32 falcon_falcon_imemc_aincw_f(u32 v) | |||
356 | { | 356 | { |
357 | return (v & 0x1U) << 24U; | 357 | return (v & 0x1U) << 24U; |
358 | } | 358 | } |
359 | static inline u32 falcon_falcon_imemc_secure_f(u32 v) | ||
360 | { | ||
361 | return (v & 0x1U) << 28U; | ||
362 | } | ||
359 | static inline u32 falcon_falcon_imemd_r(u32 i) | 363 | static inline u32 falcon_falcon_imemd_r(u32 i) |
360 | { | 364 | { |
361 | return 0x00000184U + i*16U; | 365 | return 0x00000184U + i*16U; |