diff options
author | Philip Elcan <pelcan@nvidia.com> | 2018-08-23 14:45:19 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-29 20:47:25 -0400 |
commit | 2d0149c9abd74fd6bb59e076cfd46f49097e5662 (patch) | |
tree | 3d14929f7721440b777abfc150a35abbb1b03f36 /drivers/gpu/nvgpu/gv11b | |
parent | 74639b444251d7adc222400625eb59a3d53d0c0a (diff) |
gpu: nvgpu: resolve MISRA 10.3 violations
MISRA rule 10.3 prohibits implicit assigning of u64 to u32. The nvgpu was
assigning the value returned by ARRAY_SIZE which is a u64 to a u32. This
value was then returned in a function defined by gpu_ops.
This patch changes the return type for these gpu_ops to u64 and updates
the functions that implement the functions and lastly the saved value. This
removes the violation in this instance.
JIRA NVGPU-647
Change-Id: I2b93929633cf4809d8f65ee41f739f45d4c2cda7
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1805588
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/regops_gv11b.c | 22 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/regops_gv11b.h | 14 |
2 files changed, 18 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/regops_gv11b.c b/drivers/gpu/nvgpu/gv11b/regops_gv11b.c index f84b5066..768674fe 100644 --- a/drivers/gpu/nvgpu/gv11b/regops_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/regops_gv11b.c | |||
@@ -1441,7 +1441,7 @@ static const struct regop_offset_range gv11b_global_whitelist_ranges[] = { | |||
1441 | }; | 1441 | }; |
1442 | 1442 | ||
1443 | 1443 | ||
1444 | static const u32 gv11b_global_whitelist_ranges_count = | 1444 | static const u64 gv11b_global_whitelist_ranges_count = |
1445 | ARRAY_SIZE(gv11b_global_whitelist_ranges); | 1445 | ARRAY_SIZE(gv11b_global_whitelist_ranges); |
1446 | 1446 | ||
1447 | /* context */ | 1447 | /* context */ |
@@ -1449,24 +1449,24 @@ static const u32 gv11b_global_whitelist_ranges_count = | |||
1449 | /* runcontrol */ | 1449 | /* runcontrol */ |
1450 | static const u32 gv11b_runcontrol_whitelist[] = { | 1450 | static const u32 gv11b_runcontrol_whitelist[] = { |
1451 | }; | 1451 | }; |
1452 | static const u32 gv11b_runcontrol_whitelist_count = | 1452 | static const u64 gv11b_runcontrol_whitelist_count = |
1453 | ARRAY_SIZE(gv11b_runcontrol_whitelist); | 1453 | ARRAY_SIZE(gv11b_runcontrol_whitelist); |
1454 | 1454 | ||
1455 | static const struct regop_offset_range gv11b_runcontrol_whitelist_ranges[] = { | 1455 | static const struct regop_offset_range gv11b_runcontrol_whitelist_ranges[] = { |
1456 | }; | 1456 | }; |
1457 | static const u32 gv11b_runcontrol_whitelist_ranges_count = | 1457 | static const u64 gv11b_runcontrol_whitelist_ranges_count = |
1458 | ARRAY_SIZE(gv11b_runcontrol_whitelist_ranges); | 1458 | ARRAY_SIZE(gv11b_runcontrol_whitelist_ranges); |
1459 | 1459 | ||
1460 | 1460 | ||
1461 | /* quad ctl */ | 1461 | /* quad ctl */ |
1462 | static const u32 gv11b_qctl_whitelist[] = { | 1462 | static const u32 gv11b_qctl_whitelist[] = { |
1463 | }; | 1463 | }; |
1464 | static const u32 gv11b_qctl_whitelist_count = | 1464 | static const u64 gv11b_qctl_whitelist_count = |
1465 | ARRAY_SIZE(gv11b_qctl_whitelist); | 1465 | ARRAY_SIZE(gv11b_qctl_whitelist); |
1466 | 1466 | ||
1467 | static const struct regop_offset_range gv11b_qctl_whitelist_ranges[] = { | 1467 | static const struct regop_offset_range gv11b_qctl_whitelist_ranges[] = { |
1468 | }; | 1468 | }; |
1469 | static const u32 gv11b_qctl_whitelist_ranges_count = | 1469 | static const u64 gv11b_qctl_whitelist_ranges_count = |
1470 | ARRAY_SIZE(gv11b_qctl_whitelist_ranges); | 1470 | ARRAY_SIZE(gv11b_qctl_whitelist_ranges); |
1471 | 1471 | ||
1472 | const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void) | 1472 | const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void) |
@@ -1474,7 +1474,7 @@ const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void) | |||
1474 | return gv11b_global_whitelist_ranges; | 1474 | return gv11b_global_whitelist_ranges; |
1475 | } | 1475 | } |
1476 | 1476 | ||
1477 | int gv11b_get_global_whitelist_ranges_count(void) | 1477 | u64 gv11b_get_global_whitelist_ranges_count(void) |
1478 | { | 1478 | { |
1479 | return gv11b_global_whitelist_ranges_count; | 1479 | return gv11b_global_whitelist_ranges_count; |
1480 | } | 1480 | } |
@@ -1484,7 +1484,7 @@ const struct regop_offset_range *gv11b_get_context_whitelist_ranges(void) | |||
1484 | return gv11b_global_whitelist_ranges; | 1484 | return gv11b_global_whitelist_ranges; |
1485 | } | 1485 | } |
1486 | 1486 | ||
1487 | int gv11b_get_context_whitelist_ranges_count(void) | 1487 | u64 gv11b_get_context_whitelist_ranges_count(void) |
1488 | { | 1488 | { |
1489 | return gv11b_global_whitelist_ranges_count; | 1489 | return gv11b_global_whitelist_ranges_count; |
1490 | } | 1490 | } |
@@ -1494,7 +1494,7 @@ const u32 *gv11b_get_runcontrol_whitelist(void) | |||
1494 | return gv11b_runcontrol_whitelist; | 1494 | return gv11b_runcontrol_whitelist; |
1495 | } | 1495 | } |
1496 | 1496 | ||
1497 | int gv11b_get_runcontrol_whitelist_count(void) | 1497 | u64 gv11b_get_runcontrol_whitelist_count(void) |
1498 | { | 1498 | { |
1499 | return gv11b_runcontrol_whitelist_count; | 1499 | return gv11b_runcontrol_whitelist_count; |
1500 | } | 1500 | } |
@@ -1504,7 +1504,7 @@ const struct regop_offset_range *gv11b_get_runcontrol_whitelist_ranges(void) | |||
1504 | return gv11b_runcontrol_whitelist_ranges; | 1504 | return gv11b_runcontrol_whitelist_ranges; |
1505 | } | 1505 | } |
1506 | 1506 | ||
1507 | int gv11b_get_runcontrol_whitelist_ranges_count(void) | 1507 | u64 gv11b_get_runcontrol_whitelist_ranges_count(void) |
1508 | { | 1508 | { |
1509 | return gv11b_runcontrol_whitelist_ranges_count; | 1509 | return gv11b_runcontrol_whitelist_ranges_count; |
1510 | } | 1510 | } |
@@ -1514,7 +1514,7 @@ const u32 *gv11b_get_qctl_whitelist(void) | |||
1514 | return gv11b_qctl_whitelist; | 1514 | return gv11b_qctl_whitelist; |
1515 | } | 1515 | } |
1516 | 1516 | ||
1517 | int gv11b_get_qctl_whitelist_count(void) | 1517 | u64 gv11b_get_qctl_whitelist_count(void) |
1518 | { | 1518 | { |
1519 | return gv11b_qctl_whitelist_count; | 1519 | return gv11b_qctl_whitelist_count; |
1520 | } | 1520 | } |
@@ -1524,7 +1524,7 @@ const struct regop_offset_range *gv11b_get_qctl_whitelist_ranges(void) | |||
1524 | return gv11b_qctl_whitelist_ranges; | 1524 | return gv11b_qctl_whitelist_ranges; |
1525 | } | 1525 | } |
1526 | 1526 | ||
1527 | int gv11b_get_qctl_whitelist_ranges_count(void) | 1527 | u64 gv11b_get_qctl_whitelist_ranges_count(void) |
1528 | { | 1528 | { |
1529 | return gv11b_qctl_whitelist_ranges_count; | 1529 | return gv11b_qctl_whitelist_ranges_count; |
1530 | } | 1530 | } |
diff --git a/drivers/gpu/nvgpu/gv11b/regops_gv11b.h b/drivers/gpu/nvgpu/gv11b/regops_gv11b.h index 0ee2edfe..b605c0a6 100644 --- a/drivers/gpu/nvgpu/gv11b/regops_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/regops_gv11b.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Tegra GV11B GPU Driver Register Ops | 3 | * Tegra GV11B GPU Driver Register Ops |
4 | * | 4 | * |
5 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 5 | * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. |
6 | * | 6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining a | 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
8 | * copy of this software and associated documentation files (the "Software"), | 8 | * copy of this software and associated documentation files (the "Software"), |
@@ -26,17 +26,17 @@ | |||
26 | #define __REGOPS_GV11B_H_ | 26 | #define __REGOPS_GV11B_H_ |
27 | 27 | ||
28 | const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void); | 28 | const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void); |
29 | int gv11b_get_global_whitelist_ranges_count(void); | 29 | u64 gv11b_get_global_whitelist_ranges_count(void); |
30 | const struct regop_offset_range *gv11b_get_context_whitelist_ranges(void); | 30 | const struct regop_offset_range *gv11b_get_context_whitelist_ranges(void); |
31 | int gv11b_get_context_whitelist_ranges_count(void); | 31 | u64 gv11b_get_context_whitelist_ranges_count(void); |
32 | const u32 *gv11b_get_runcontrol_whitelist(void); | 32 | const u32 *gv11b_get_runcontrol_whitelist(void); |
33 | int gv11b_get_runcontrol_whitelist_count(void); | 33 | u64 gv11b_get_runcontrol_whitelist_count(void); |
34 | const struct regop_offset_range *gv11b_get_runcontrol_whitelist_ranges(void); | 34 | const struct regop_offset_range *gv11b_get_runcontrol_whitelist_ranges(void); |
35 | int gv11b_get_runcontrol_whitelist_ranges_count(void); | 35 | u64 gv11b_get_runcontrol_whitelist_ranges_count(void); |
36 | const u32 *gv11b_get_qctl_whitelist(void); | 36 | const u32 *gv11b_get_qctl_whitelist(void); |
37 | int gv11b_get_qctl_whitelist_count(void); | 37 | u64 gv11b_get_qctl_whitelist_count(void); |
38 | const struct regop_offset_range *gv11b_get_qctl_whitelist_ranges(void); | 38 | const struct regop_offset_range *gv11b_get_qctl_whitelist_ranges(void); |
39 | int gv11b_get_qctl_whitelist_ranges_count(void); | 39 | u64 gv11b_get_qctl_whitelist_ranges_count(void); |
40 | int gv11b_apply_smpc_war(struct dbg_session_gk20a *dbg_s); | 40 | int gv11b_apply_smpc_war(struct dbg_session_gk20a *dbg_s); |
41 | 41 | ||
42 | #endif /* __REGOPS_GV11B_H_ */ | 42 | #endif /* __REGOPS_GV11B_H_ */ |