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authorDeepak Goyal <dgoyal@nvidia.com>2017-11-15 01:10:54 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-12-14 12:03:45 -0500
commit49be5d49292c9c853f5b6ad53c32d59f866322ec (patch)
tree8e34c42aff1cad6ea0fe4e2d9885dcd9043ef1ab /drivers/gpu/nvgpu/gv11b/gv11b.c
parent1bf9b91c05ceebf872171a536c2660ee69fa5f64 (diff)
gpu: nvgpu: gv11b: implement ecc scrubber
Check the availability of ecc units by checking relevant ecc fuse and fuse overrides. During gpu boot, initialize ecc units by scrubbing individual ecc units available. ECC initialization should be done before gr initialization. Following ecc units are scrubbed: SM LRF SM L1 DATA SM L1 TAG SM CBU SM ICACHE Bug 200339497 Change-Id: I54bf8cc1fce639a9993bf80984dafc28dca0dba3 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612734 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/gv11b.c120
1 files changed, 120 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gv11b.c b/drivers/gpu/nvgpu/gv11b/gv11b.c
index 211755e5..a62e49fb 100644
--- a/drivers/gpu/nvgpu/gv11b/gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gv11b.c
@@ -26,8 +26,128 @@
26#include <nvgpu/enabled_t19x.h> 26#include <nvgpu/enabled_t19x.h>
27 27
28#include "gk20a/gk20a.h" 28#include "gk20a/gk20a.h"
29#include "gp10b/gp10b.h"
29 30
30#include "gv11b/gv11b.h" 31#include "gv11b/gv11b.h"
32#include <nvgpu/hw/gv11b/hw_fuse_gv11b.h>
33#include <nvgpu/hw/gv11b/hw_gr_gv11b.h>
34
35void gv11b_detect_ecc_enabled_units(struct gk20a *g)
36{
37 u32 opt_ecc_en = gk20a_readl(g, fuse_opt_ecc_en_r());
38 u32 opt_feature_fuses_override_disable =
39 gk20a_readl(g,
40 fuse_opt_feature_fuses_override_disable_r());
41 u32 fecs_feature_override_ecc =
42 gk20a_readl(g,
43 gr_fecs_feature_override_ecc_r());
44
45 if (opt_feature_fuses_override_disable) {
46 if (opt_ecc_en) {
47 __nvgpu_set_enabled(g,
48 NVGPU_ECC_ENABLED_SM_LRF, true);
49 __nvgpu_set_enabled(g,
50 NVGPU_ECC_ENABLED_SM_L1_DATA, true);
51 __nvgpu_set_enabled(g,
52 NVGPU_ECC_ENABLED_SM_L1_TAG, true);
53 __nvgpu_set_enabled(g,
54 NVGPU_ECC_ENABLED_SM_ICACHE, true);
55 __nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_LTC, true);
56 __nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_SM_CBU, true);
57 }
58 } else {
59 /* SM LRF */
60 if (gr_fecs_feature_override_ecc_sm_lrf_override_v(
61 fecs_feature_override_ecc)) {
62 if (gr_fecs_feature_override_ecc_sm_lrf_v(
63 fecs_feature_override_ecc)) {
64 __nvgpu_set_enabled(g,
65 NVGPU_ECC_ENABLED_SM_LRF, true);
66 }
67 } else {
68 if (opt_ecc_en) {
69 __nvgpu_set_enabled(g,
70 NVGPU_ECC_ENABLED_SM_LRF, true);
71 }
72 }
73 /* SM L1 DATA*/
74 if (gr_fecs_feature_override_ecc_sm_l1_data_override_v(
75 fecs_feature_override_ecc)) {
76 if (gr_fecs_feature_override_ecc_sm_l1_data_v(
77 fecs_feature_override_ecc)) {
78 __nvgpu_set_enabled(g,
79 NVGPU_ECC_ENABLED_SM_L1_DATA, true);
80 }
81 } else {
82 if (opt_ecc_en) {
83 __nvgpu_set_enabled(g,
84 NVGPU_ECC_ENABLED_SM_L1_DATA, true);
85 }
86 }
87 /* SM L1 TAG*/
88 if (gr_fecs_feature_override_ecc_sm_l1_tag_override_v(
89 fecs_feature_override_ecc)) {
90 if (gr_fecs_feature_override_ecc_sm_l1_tag_v(
91 fecs_feature_override_ecc)) {
92 __nvgpu_set_enabled(g,
93 NVGPU_ECC_ENABLED_SM_L1_TAG, true);
94 }
95 } else {
96 if (opt_ecc_en) {
97 __nvgpu_set_enabled(g,
98 NVGPU_ECC_ENABLED_SM_L1_TAG, true);
99 }
100 }
101 /* SM ICACHE*/
102 if (gr_fecs_feature_override_ecc_1_sm_l0_icache_override_v(
103 fecs_feature_override_ecc) &&
104 gr_fecs_feature_override_ecc_1_sm_l1_icache_override_v(
105 fecs_feature_override_ecc)) {
106 if (gr_fecs_feature_override_ecc_1_sm_l0_icache_v(
107 fecs_feature_override_ecc) &&
108 gr_fecs_feature_override_ecc_1_sm_l1_icache_v(
109 fecs_feature_override_ecc)) {
110 __nvgpu_set_enabled(g,
111 NVGPU_ECC_ENABLED_SM_ICACHE, true);
112 }
113 } else {
114 if (opt_ecc_en) {
115 __nvgpu_set_enabled(g,
116 NVGPU_ECC_ENABLED_SM_ICACHE, true);
117 }
118 }
119 /* LTC */
120 if (gr_fecs_feature_override_ecc_ltc_override_v(
121 fecs_feature_override_ecc)) {
122 if (gr_fecs_feature_override_ecc_ltc_v(
123 fecs_feature_override_ecc)) {
124 __nvgpu_set_enabled(g,
125 NVGPU_ECC_ENABLED_LTC, true);
126 }
127 } else {
128 if (opt_ecc_en) {
129 __nvgpu_set_enabled(g,
130 NVGPU_ECC_ENABLED_LTC, true);
131 }
132 }
133 /* SM CBU */
134 if (gr_fecs_feature_override_ecc_sm_cbu_override_v(
135 fecs_feature_override_ecc)) {
136 if (gr_fecs_feature_override_ecc_sm_cbu_v(
137 fecs_feature_override_ecc)) {
138 __nvgpu_set_enabled(g,
139 NVGPU_ECC_ENABLED_SM_CBU, true);
140 }
141 } else {
142 if (opt_ecc_en) {
143 __nvgpu_set_enabled(g,
144 NVGPU_ECC_ENABLED_SM_CBU, true);
145 }
146 }
147 }
148}
149
150
31 151
32int gv11b_init_gpu_characteristics(struct gk20a *g) 152int gv11b_init_gpu_characteristics(struct gk20a *g)
33{ 153{