From 49be5d49292c9c853f5b6ad53c32d59f866322ec Mon Sep 17 00:00:00 2001 From: Deepak Goyal Date: Wed, 15 Nov 2017 11:40:54 +0530 Subject: gpu: nvgpu: gv11b: implement ecc scrubber Check the availability of ecc units by checking relevant ecc fuse and fuse overrides. During gpu boot, initialize ecc units by scrubbing individual ecc units available. ECC initialization should be done before gr initialization. Following ecc units are scrubbed: SM LRF SM L1 DATA SM L1 TAG SM CBU SM ICACHE Bug 200339497 Change-Id: I54bf8cc1fce639a9993bf80984dafc28dca0dba3 Signed-off-by: Deepak Goyal Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1612734 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gv11b.c | 120 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b.c b/drivers/gpu/nvgpu/gv11b/gv11b.c index 211755e5..a62e49fb 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b.c @@ -26,8 +26,128 @@ #include #include "gk20a/gk20a.h" +#include "gp10b/gp10b.h" #include "gv11b/gv11b.h" +#include +#include + +void gv11b_detect_ecc_enabled_units(struct gk20a *g) +{ + u32 opt_ecc_en = gk20a_readl(g, fuse_opt_ecc_en_r()); + u32 opt_feature_fuses_override_disable = + gk20a_readl(g, + fuse_opt_feature_fuses_override_disable_r()); + u32 fecs_feature_override_ecc = + gk20a_readl(g, + gr_fecs_feature_override_ecc_r()); + + if (opt_feature_fuses_override_disable) { + if (opt_ecc_en) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_LRF, true); + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_L1_DATA, true); + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_L1_TAG, true); + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_ICACHE, true); + __nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_LTC, true); + __nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_SM_CBU, true); + } + } else { + /* SM LRF */ + if (gr_fecs_feature_override_ecc_sm_lrf_override_v( + fecs_feature_override_ecc)) { + if (gr_fecs_feature_override_ecc_sm_lrf_v( + fecs_feature_override_ecc)) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_LRF, true); + } + } else { + if (opt_ecc_en) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_LRF, true); + } + } + /* SM L1 DATA*/ + if (gr_fecs_feature_override_ecc_sm_l1_data_override_v( + fecs_feature_override_ecc)) { + if (gr_fecs_feature_override_ecc_sm_l1_data_v( + fecs_feature_override_ecc)) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_L1_DATA, true); + } + } else { + if (opt_ecc_en) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_L1_DATA, true); + } + } + /* SM L1 TAG*/ + if (gr_fecs_feature_override_ecc_sm_l1_tag_override_v( + fecs_feature_override_ecc)) { + if (gr_fecs_feature_override_ecc_sm_l1_tag_v( + fecs_feature_override_ecc)) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_L1_TAG, true); + } + } else { + if (opt_ecc_en) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_L1_TAG, true); + } + } + /* SM ICACHE*/ + if (gr_fecs_feature_override_ecc_1_sm_l0_icache_override_v( + fecs_feature_override_ecc) && + gr_fecs_feature_override_ecc_1_sm_l1_icache_override_v( + fecs_feature_override_ecc)) { + if (gr_fecs_feature_override_ecc_1_sm_l0_icache_v( + fecs_feature_override_ecc) && + gr_fecs_feature_override_ecc_1_sm_l1_icache_v( + fecs_feature_override_ecc)) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_ICACHE, true); + } + } else { + if (opt_ecc_en) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_ICACHE, true); + } + } + /* LTC */ + if (gr_fecs_feature_override_ecc_ltc_override_v( + fecs_feature_override_ecc)) { + if (gr_fecs_feature_override_ecc_ltc_v( + fecs_feature_override_ecc)) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_LTC, true); + } + } else { + if (opt_ecc_en) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_LTC, true); + } + } + /* SM CBU */ + if (gr_fecs_feature_override_ecc_sm_cbu_override_v( + fecs_feature_override_ecc)) { + if (gr_fecs_feature_override_ecc_sm_cbu_v( + fecs_feature_override_ecc)) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_CBU, true); + } + } else { + if (opt_ecc_en) { + __nvgpu_set_enabled(g, + NVGPU_ECC_ENABLED_SM_CBU, true); + } + } + } +} + + int gv11b_init_gpu_characteristics(struct gk20a *g) { -- cgit v1.2.2