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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-01-17 15:39:13 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-23 01:20:15 -0500
commitf3f14cdff53f4b936e2505d44aad6e3bca143056 (patch)
tree8d6438132b8ca429758d18142c5f569f60f2bc35 /drivers/gpu/nvgpu/gv11b/gr_gv11b.c
parent193a2ed38ca51d898ac811820ab86237c84e18eb (diff)
gpu: nvgpu: Fold T19x code back to main code paths
Lots of code paths were split to T19x specific code paths and structs due to split repository. Now that repositories are merged, fold all of them back to main code paths and structs and remove the T19x specific Kconfig flag. Change-Id: Id0d17a5f0610fc0b49f51ab6664e716dc8b222b6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1640606 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/gr_gv11b.c46
1 files changed, 23 insertions, 23 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index 9c79b29b..7288284e 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -189,7 +189,7 @@ static int gr_gv11b_handle_l1_tag_exception(struct gk20a *g, u32 gpc, u32 tpc,
189 l1_tag_corrected_err_count_delta += 189 l1_tag_corrected_err_count_delta +=
190 (is_l1_tag_ecc_corrected_total_err_overflow << 190 (is_l1_tag_ecc_corrected_total_err_overflow <<
191 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_total_s()); 191 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_total_s());
192 g->ecc.gr.t19x.sm_l1_tag_corrected_err_count.counters[tpc] += 192 g->ecc.gr.sm_l1_tag_corrected_err_count.counters[tpc] +=
193 l1_tag_corrected_err_count_delta; 193 l1_tag_corrected_err_count_delta;
194 gk20a_writel(g, 194 gk20a_writel(g,
195 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_r() + offset, 195 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_r() + offset,
@@ -204,7 +204,7 @@ static int gr_gv11b_handle_l1_tag_exception(struct gk20a *g, u32 gpc, u32 tpc,
204 l1_tag_uncorrected_err_count_delta += 204 l1_tag_uncorrected_err_count_delta +=
205 (is_l1_tag_ecc_uncorrected_total_err_overflow << 205 (is_l1_tag_ecc_uncorrected_total_err_overflow <<
206 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_total_s()); 206 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_total_s());
207 g->ecc.gr.t19x.sm_l1_tag_uncorrected_err_count.counters[tpc] += 207 g->ecc.gr.sm_l1_tag_uncorrected_err_count.counters[tpc] +=
208 l1_tag_uncorrected_err_count_delta; 208 l1_tag_uncorrected_err_count_delta;
209 gk20a_writel(g, 209 gk20a_writel(g,
210 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_r() + offset, 210 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_r() + offset,
@@ -399,7 +399,7 @@ static int gr_gv11b_handle_cbu_exception(struct gk20a *g, u32 gpc, u32 tpc,
399 cbu_corrected_err_count_delta += 399 cbu_corrected_err_count_delta +=
400 (is_cbu_ecc_corrected_total_err_overflow << 400 (is_cbu_ecc_corrected_total_err_overflow <<
401 gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_total_s()); 401 gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_total_s());
402 g->ecc.gr.t19x.sm_cbu_corrected_err_count.counters[tpc] += 402 g->ecc.gr.sm_cbu_corrected_err_count.counters[tpc] +=
403 cbu_corrected_err_count_delta; 403 cbu_corrected_err_count_delta;
404 gk20a_writel(g, 404 gk20a_writel(g,
405 gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_r() + offset, 405 gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_r() + offset,
@@ -414,7 +414,7 @@ static int gr_gv11b_handle_cbu_exception(struct gk20a *g, u32 gpc, u32 tpc,
414 cbu_uncorrected_err_count_delta += 414 cbu_uncorrected_err_count_delta +=
415 (is_cbu_ecc_uncorrected_total_err_overflow << 415 (is_cbu_ecc_uncorrected_total_err_overflow <<
416 gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_total_s()); 416 gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_total_s());
417 g->ecc.gr.t19x.sm_cbu_uncorrected_err_count.counters[tpc] += 417 g->ecc.gr.sm_cbu_uncorrected_err_count.counters[tpc] +=
418 cbu_uncorrected_err_count_delta; 418 cbu_uncorrected_err_count_delta;
419 gk20a_writel(g, 419 gk20a_writel(g,
420 gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_r() + offset, 420 gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_r() + offset,
@@ -479,7 +479,7 @@ static int gr_gv11b_handle_l1_data_exception(struct gk20a *g, u32 gpc, u32 tpc,
479 l1_data_corrected_err_count_delta += 479 l1_data_corrected_err_count_delta +=
480 (is_l1_data_ecc_corrected_total_err_overflow << 480 (is_l1_data_ecc_corrected_total_err_overflow <<
481 gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_total_s()); 481 gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_total_s());
482 g->ecc.gr.t19x.sm_l1_data_corrected_err_count.counters[tpc] += 482 g->ecc.gr.sm_l1_data_corrected_err_count.counters[tpc] +=
483 l1_data_corrected_err_count_delta; 483 l1_data_corrected_err_count_delta;
484 gk20a_writel(g, 484 gk20a_writel(g,
485 gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_r() + offset, 485 gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_r() + offset,
@@ -494,7 +494,7 @@ static int gr_gv11b_handle_l1_data_exception(struct gk20a *g, u32 gpc, u32 tpc,
494 l1_data_uncorrected_err_count_delta += 494 l1_data_uncorrected_err_count_delta +=
495 (is_l1_data_ecc_uncorrected_total_err_overflow << 495 (is_l1_data_ecc_uncorrected_total_err_overflow <<
496 gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_total_s()); 496 gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_total_s());
497 g->ecc.gr.t19x.sm_l1_data_uncorrected_err_count.counters[tpc] += 497 g->ecc.gr.sm_l1_data_uncorrected_err_count.counters[tpc] +=
498 l1_data_uncorrected_err_count_delta; 498 l1_data_uncorrected_err_count_delta;
499 gk20a_writel(g, 499 gk20a_writel(g,
500 gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_r() + offset, 500 gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_r() + offset,
@@ -563,7 +563,7 @@ static int gr_gv11b_handle_icache_exception(struct gk20a *g, u32 gpc, u32 tpc,
563 icache_corrected_err_count_delta += 563 icache_corrected_err_count_delta +=
564 (is_icache_ecc_corrected_total_err_overflow << 564 (is_icache_ecc_corrected_total_err_overflow <<
565 gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_total_s()); 565 gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_total_s());
566 g->ecc.gr.t19x.sm_icache_corrected_err_count.counters[tpc] += 566 g->ecc.gr.sm_icache_corrected_err_count.counters[tpc] +=
567 icache_corrected_err_count_delta; 567 icache_corrected_err_count_delta;
568 gk20a_writel(g, 568 gk20a_writel(g,
569 gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_r() + offset, 569 gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_r() + offset,
@@ -578,7 +578,7 @@ static int gr_gv11b_handle_icache_exception(struct gk20a *g, u32 gpc, u32 tpc,
578 icache_uncorrected_err_count_delta += 578 icache_uncorrected_err_count_delta +=
579 (is_icache_ecc_uncorrected_total_err_overflow << 579 (is_icache_ecc_uncorrected_total_err_overflow <<
580 gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_total_s()); 580 gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_total_s());
581 g->ecc.gr.t19x.sm_icache_uncorrected_err_count.counters[tpc] += 581 g->ecc.gr.sm_icache_uncorrected_err_count.counters[tpc] +=
582 icache_uncorrected_err_count_delta; 582 icache_uncorrected_err_count_delta;
583 gk20a_writel(g, 583 gk20a_writel(g,
584 gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_r() + offset, 584 gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_r() + offset,
@@ -667,7 +667,7 @@ int gr_gv11b_handle_gcc_exception(struct gk20a *g, u32 gpc, u32 tpc,
667 gcc_l15_corrected_err_count_delta += 667 gcc_l15_corrected_err_count_delta +=
668 (is_gcc_l15_ecc_corrected_total_err_overflow << 668 (is_gcc_l15_ecc_corrected_total_err_overflow <<
669 gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_total_s()); 669 gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_total_s());
670 g->ecc.gr.t19x.gcc_l15_corrected_err_count.counters[gpc] += 670 g->ecc.gr.gcc_l15_corrected_err_count.counters[gpc] +=
671 gcc_l15_corrected_err_count_delta; 671 gcc_l15_corrected_err_count_delta;
672 gk20a_writel(g, 672 gk20a_writel(g,
673 gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_r() + offset, 673 gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_r() + offset,
@@ -682,7 +682,7 @@ int gr_gv11b_handle_gcc_exception(struct gk20a *g, u32 gpc, u32 tpc,
682 gcc_l15_uncorrected_err_count_delta += 682 gcc_l15_uncorrected_err_count_delta +=
683 (is_gcc_l15_ecc_uncorrected_total_err_overflow << 683 (is_gcc_l15_ecc_uncorrected_total_err_overflow <<
684 gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_total_s()); 684 gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_total_s());
685 g->ecc.gr.t19x.gcc_l15_uncorrected_err_count.counters[gpc] += 685 g->ecc.gr.gcc_l15_uncorrected_err_count.counters[gpc] +=
686 gcc_l15_uncorrected_err_count_delta; 686 gcc_l15_uncorrected_err_count_delta;
687 gk20a_writel(g, 687 gk20a_writel(g,
688 gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_r() + offset, 688 gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_r() + offset,
@@ -752,9 +752,9 @@ static int gr_gv11b_handle_gpcmmu_ecc_exception(struct gk20a *g, u32 gpc,
752 uncorrected_delta += (0x1UL << gr_gpc0_mmu_l1tlb_ecc_uncorrected_err_count_total_s()); 752 uncorrected_delta += (0x1UL << gr_gpc0_mmu_l1tlb_ecc_uncorrected_err_count_total_s());
753 753
754 754
755 g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count.counters[gpc] += 755 g->ecc.gr.mmu_l1tlb_corrected_err_count.counters[gpc] +=
756 corrected_delta; 756 corrected_delta;
757 g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count.counters[gpc] += 757 g->ecc.gr.mmu_l1tlb_uncorrected_err_count.counters[gpc] +=
758 uncorrected_delta; 758 uncorrected_delta;
759 nvgpu_log(g, gpu_dbg_intr, 759 nvgpu_log(g, gpu_dbg_intr,
760 "mmu l1tlb gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr); 760 "mmu l1tlb gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr);
@@ -774,8 +774,8 @@ static int gr_gv11b_handle_gpcmmu_ecc_exception(struct gk20a *g, u32 gpc,
774 "ecc error address: 0x%x", ecc_addr); 774 "ecc error address: 0x%x", ecc_addr);
775 nvgpu_log(g, gpu_dbg_intr, 775 nvgpu_log(g, gpu_dbg_intr,
776 "ecc error count corrected: %d, uncorrected %d", 776 "ecc error count corrected: %d, uncorrected %d",
777 g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count.counters[gpc], 777 g->ecc.gr.mmu_l1tlb_corrected_err_count.counters[gpc],
778 g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count.counters[gpc]); 778 g->ecc.gr.mmu_l1tlb_uncorrected_err_count.counters[gpc]);
779 779
780 return ret; 780 return ret;
781} 781}
@@ -830,9 +830,9 @@ static int gr_gv11b_handle_gpccs_ecc_exception(struct gk20a *g, u32 gpc,
830 gk20a_writel(g, gr_gpc0_gpccs_falcon_ecc_status_r() + offset, 830 gk20a_writel(g, gr_gpc0_gpccs_falcon_ecc_status_r() + offset,
831 gr_gpc0_gpccs_falcon_ecc_status_reset_task_f()); 831 gr_gpc0_gpccs_falcon_ecc_status_reset_task_f());
832 832
833 g->ecc.gr.t19x.gpccs_corrected_err_count.counters[gpc] += 833 g->ecc.gr.gpccs_corrected_err_count.counters[gpc] +=
834 corrected_delta; 834 corrected_delta;
835 g->ecc.gr.t19x.gpccs_uncorrected_err_count.counters[gpc] += 835 g->ecc.gr.gpccs_uncorrected_err_count.counters[gpc] +=
836 uncorrected_delta; 836 uncorrected_delta;
837 nvgpu_log(g, gpu_dbg_intr, 837 nvgpu_log(g, gpu_dbg_intr,
838 "gppcs gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr); 838 "gppcs gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr);
@@ -857,8 +857,8 @@ static int gr_gv11b_handle_gpccs_ecc_exception(struct gk20a *g, u32 gpc,
857 857
858 nvgpu_log(g, gpu_dbg_intr, 858 nvgpu_log(g, gpu_dbg_intr,
859 "ecc error count corrected: %d, uncorrected %d", 859 "ecc error count corrected: %d, uncorrected %d",
860 g->ecc.gr.t19x.gpccs_corrected_err_count.counters[gpc], 860 g->ecc.gr.gpccs_corrected_err_count.counters[gpc],
861 g->ecc.gr.t19x.gpccs_uncorrected_err_count.counters[gpc]); 861 g->ecc.gr.gpccs_uncorrected_err_count.counters[gpc]);
862 862
863 return ret; 863 return ret;
864} 864}
@@ -2206,9 +2206,9 @@ static void gr_gv11b_handle_fecs_ecc_error(struct gk20a *g, u32 intr)
2206 gk20a_writel(g, gr_fecs_falcon_ecc_status_r(), 2206 gk20a_writel(g, gr_fecs_falcon_ecc_status_r(),
2207 gr_fecs_falcon_ecc_status_reset_task_f()); 2207 gr_fecs_falcon_ecc_status_reset_task_f());
2208 2208
2209 g->ecc.gr.t19x.fecs_corrected_err_count.counters[0] += 2209 g->ecc.gr.fecs_corrected_err_count.counters[0] +=
2210 corrected_delta; 2210 corrected_delta;
2211 g->ecc.gr.t19x.fecs_uncorrected_err_count.counters[0] += 2211 g->ecc.gr.fecs_uncorrected_err_count.counters[0] +=
2212 uncorrected_delta; 2212 uncorrected_delta;
2213 2213
2214 nvgpu_log(g, gpu_dbg_intr, 2214 nvgpu_log(g, gpu_dbg_intr,
@@ -2237,8 +2237,8 @@ static void gr_gv11b_handle_fecs_ecc_error(struct gk20a *g, u32 intr)
2237 2237
2238 nvgpu_log(g, gpu_dbg_intr, 2238 nvgpu_log(g, gpu_dbg_intr,
2239 "ecc error count corrected: %d, uncorrected %d", 2239 "ecc error count corrected: %d, uncorrected %d",
2240 g->ecc.gr.t19x.fecs_corrected_err_count.counters[0], 2240 g->ecc.gr.fecs_corrected_err_count.counters[0],
2241 g->ecc.gr.t19x.fecs_uncorrected_err_count.counters[0]); 2241 g->ecc.gr.fecs_uncorrected_err_count.counters[0]);
2242 } 2242 }
2243} 2243}
2244 2244
@@ -2323,7 +2323,7 @@ static int gv11b_write_bundle_veid_state(struct gk20a *g, u32 index)
2323 u32 j; 2323 u32 j;
2324 u32 num_subctx, err = 0; 2324 u32 num_subctx, err = 0;
2325 2325
2326 num_subctx = g->fifo.t19x.max_subctx_count; 2326 num_subctx = g->fifo.max_subctx_count;
2327 2327
2328 for (j = 0; j < num_subctx; j++) { 2328 for (j = 0; j < num_subctx; j++) {
2329 nvgpu_log_fn(g, "write bundle_address_r for subctx: %d", j); 2329 nvgpu_log_fn(g, "write bundle_address_r for subctx: %d", j);