From f3f14cdff53f4b936e2505d44aad6e3bca143056 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 17 Jan 2018 12:39:13 -0800 Subject: gpu: nvgpu: Fold T19x code back to main code paths Lots of code paths were split to T19x specific code paths and structs due to split repository. Now that repositories are merged, fold all of them back to main code paths and structs and remove the T19x specific Kconfig flag. Change-Id: Id0d17a5f0610fc0b49f51ab6664e716dc8b222b6 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1640606 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 46 +++++++++++++++++++------------------- 1 file changed, 23 insertions(+), 23 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 9c79b29b..7288284e 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -189,7 +189,7 @@ static int gr_gv11b_handle_l1_tag_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_tag_corrected_err_count_delta += (is_l1_tag_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_total_s()); - g->ecc.gr.t19x.sm_l1_tag_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_tag_corrected_err_count.counters[tpc] += l1_tag_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_r() + offset, @@ -204,7 +204,7 @@ static int gr_gv11b_handle_l1_tag_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_tag_uncorrected_err_count_delta += (is_l1_tag_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.t19x.sm_l1_tag_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_tag_uncorrected_err_count.counters[tpc] += l1_tag_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_r() + offset, @@ -399,7 +399,7 @@ static int gr_gv11b_handle_cbu_exception(struct gk20a *g, u32 gpc, u32 tpc, cbu_corrected_err_count_delta += (is_cbu_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_total_s()); - g->ecc.gr.t19x.sm_cbu_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_cbu_corrected_err_count.counters[tpc] += cbu_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_r() + offset, @@ -414,7 +414,7 @@ static int gr_gv11b_handle_cbu_exception(struct gk20a *g, u32 gpc, u32 tpc, cbu_uncorrected_err_count_delta += (is_cbu_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.t19x.sm_cbu_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_cbu_uncorrected_err_count.counters[tpc] += cbu_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_r() + offset, @@ -479,7 +479,7 @@ static int gr_gv11b_handle_l1_data_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_data_corrected_err_count_delta += (is_l1_data_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_total_s()); - g->ecc.gr.t19x.sm_l1_data_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_data_corrected_err_count.counters[tpc] += l1_data_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_r() + offset, @@ -494,7 +494,7 @@ static int gr_gv11b_handle_l1_data_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_data_uncorrected_err_count_delta += (is_l1_data_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.t19x.sm_l1_data_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_data_uncorrected_err_count.counters[tpc] += l1_data_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_r() + offset, @@ -563,7 +563,7 @@ static int gr_gv11b_handle_icache_exception(struct gk20a *g, u32 gpc, u32 tpc, icache_corrected_err_count_delta += (is_icache_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_total_s()); - g->ecc.gr.t19x.sm_icache_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_icache_corrected_err_count.counters[tpc] += icache_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_r() + offset, @@ -578,7 +578,7 @@ static int gr_gv11b_handle_icache_exception(struct gk20a *g, u32 gpc, u32 tpc, icache_uncorrected_err_count_delta += (is_icache_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.t19x.sm_icache_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_icache_uncorrected_err_count.counters[tpc] += icache_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_r() + offset, @@ -667,7 +667,7 @@ int gr_gv11b_handle_gcc_exception(struct gk20a *g, u32 gpc, u32 tpc, gcc_l15_corrected_err_count_delta += (is_gcc_l15_ecc_corrected_total_err_overflow << gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_total_s()); - g->ecc.gr.t19x.gcc_l15_corrected_err_count.counters[gpc] += + g->ecc.gr.gcc_l15_corrected_err_count.counters[gpc] += gcc_l15_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_r() + offset, @@ -682,7 +682,7 @@ int gr_gv11b_handle_gcc_exception(struct gk20a *g, u32 gpc, u32 tpc, gcc_l15_uncorrected_err_count_delta += (is_gcc_l15_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.t19x.gcc_l15_uncorrected_err_count.counters[gpc] += + g->ecc.gr.gcc_l15_uncorrected_err_count.counters[gpc] += gcc_l15_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_r() + offset, @@ -752,9 +752,9 @@ static int gr_gv11b_handle_gpcmmu_ecc_exception(struct gk20a *g, u32 gpc, uncorrected_delta += (0x1UL << gr_gpc0_mmu_l1tlb_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count.counters[gpc] += + g->ecc.gr.mmu_l1tlb_corrected_err_count.counters[gpc] += corrected_delta; - g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count.counters[gpc] += + g->ecc.gr.mmu_l1tlb_uncorrected_err_count.counters[gpc] += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, "mmu l1tlb gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr); @@ -774,8 +774,8 @@ static int gr_gv11b_handle_gpcmmu_ecc_exception(struct gk20a *g, u32 gpc, "ecc error address: 0x%x", ecc_addr); nvgpu_log(g, gpu_dbg_intr, "ecc error count corrected: %d, uncorrected %d", - g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count.counters[gpc], - g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count.counters[gpc]); + g->ecc.gr.mmu_l1tlb_corrected_err_count.counters[gpc], + g->ecc.gr.mmu_l1tlb_uncorrected_err_count.counters[gpc]); return ret; } @@ -830,9 +830,9 @@ static int gr_gv11b_handle_gpccs_ecc_exception(struct gk20a *g, u32 gpc, gk20a_writel(g, gr_gpc0_gpccs_falcon_ecc_status_r() + offset, gr_gpc0_gpccs_falcon_ecc_status_reset_task_f()); - g->ecc.gr.t19x.gpccs_corrected_err_count.counters[gpc] += + g->ecc.gr.gpccs_corrected_err_count.counters[gpc] += corrected_delta; - g->ecc.gr.t19x.gpccs_uncorrected_err_count.counters[gpc] += + g->ecc.gr.gpccs_uncorrected_err_count.counters[gpc] += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, "gppcs gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr); @@ -857,8 +857,8 @@ static int gr_gv11b_handle_gpccs_ecc_exception(struct gk20a *g, u32 gpc, nvgpu_log(g, gpu_dbg_intr, "ecc error count corrected: %d, uncorrected %d", - g->ecc.gr.t19x.gpccs_corrected_err_count.counters[gpc], - g->ecc.gr.t19x.gpccs_uncorrected_err_count.counters[gpc]); + g->ecc.gr.gpccs_corrected_err_count.counters[gpc], + g->ecc.gr.gpccs_uncorrected_err_count.counters[gpc]); return ret; } @@ -2206,9 +2206,9 @@ static void gr_gv11b_handle_fecs_ecc_error(struct gk20a *g, u32 intr) gk20a_writel(g, gr_fecs_falcon_ecc_status_r(), gr_fecs_falcon_ecc_status_reset_task_f()); - g->ecc.gr.t19x.fecs_corrected_err_count.counters[0] += + g->ecc.gr.fecs_corrected_err_count.counters[0] += corrected_delta; - g->ecc.gr.t19x.fecs_uncorrected_err_count.counters[0] += + g->ecc.gr.fecs_uncorrected_err_count.counters[0] += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, @@ -2237,8 +2237,8 @@ static void gr_gv11b_handle_fecs_ecc_error(struct gk20a *g, u32 intr) nvgpu_log(g, gpu_dbg_intr, "ecc error count corrected: %d, uncorrected %d", - g->ecc.gr.t19x.fecs_corrected_err_count.counters[0], - g->ecc.gr.t19x.fecs_uncorrected_err_count.counters[0]); + g->ecc.gr.fecs_corrected_err_count.counters[0], + g->ecc.gr.fecs_uncorrected_err_count.counters[0]); } } @@ -2323,7 +2323,7 @@ static int gv11b_write_bundle_veid_state(struct gk20a *g, u32 index) u32 j; u32 num_subctx, err = 0; - num_subctx = g->fifo.t19x.max_subctx_count; + num_subctx = g->fifo.max_subctx_count; for (j = 0; j < num_subctx; j++) { nvgpu_log_fn(g, "write bundle_address_r for subctx: %d", j); -- cgit v1.2.2