diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2017-11-16 02:21:19 -0500 |
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committer | Deepak Nibade <dnibade@nvidia.com> | 2017-11-16 02:21:35 -0500 |
commit | ba8dc318595f597308902ad16ffed89bdbe7000f (patch) | |
tree | e882886e0cbc05ac39473b95ead16ee50bd69c15 /drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |
parent | 69e032653df5aae335764f6346703a1e55c96a2d (diff) | |
parent | 77a90d0b8d2eb1bbb207ae5f46b357f2d7cd07ab (diff) |
Merge remote-tracking branch 'remotes/origin/dev/linux-nvgpu-t19x' into linux-nvgpu
Bug 200363166
Change-Id: Ic662d7b44b673db28dc0aeba338ae67cf2a43d64
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/fifo_gv11b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 117 |
1 files changed, 117 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h new file mode 100644 index 00000000..fc1ddf83 --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |||
@@ -0,0 +1,117 @@ | |||
1 | /* | ||
2 | * GV11B Fifo | ||
3 | * | ||
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #ifndef FIFO_GV11B_H | ||
26 | #define FIFO_GV11B_H | ||
27 | |||
28 | #define FIFO_INVAL_PBDMA_ID ((u32)~0) | ||
29 | #define FIFO_INVAL_VEID ((u32)~0) | ||
30 | |||
31 | /* engine context-switch request occurred while the engine was in reset */ | ||
32 | #define SCHED_ERROR_CODE_ENGINE_RESET 0x00000005 | ||
33 | |||
34 | /* | ||
35 | * ERROR_CODE_BAD_TSG indicates that Host encountered a badly formed TSG header | ||
36 | * or a badly formed channel type runlist entry in the runlist. This is typically | ||
37 | * caused by encountering a new TSG entry in the middle of a TSG definition. | ||
38 | * A channel type entry having wrong runqueue selector can also cause this. | ||
39 | * Additionally this error code can indicate when a channel is encountered on | ||
40 | * the runlist which is outside of a TSG. | ||
41 | */ | ||
42 | #define SCHED_ERROR_CODE_BAD_TSG 0x00000020 | ||
43 | |||
44 | /* can be removed after runque support is added */ | ||
45 | |||
46 | #define GR_RUNQUE 0 /* pbdma 0 */ | ||
47 | #define ASYNC_CE_RUNQUE 2 /* pbdma 2 */ | ||
48 | |||
49 | #define CHANNEL_INFO_VEID0 0 | ||
50 | |||
51 | struct gpu_ops; | ||
52 | |||
53 | void gv11b_fifo_reset_pbdma_and_eng_faulted(struct gk20a *g, | ||
54 | struct channel_gk20a *refch, | ||
55 | u32 faulted_pbdma, u32 faulted_engine); | ||
56 | void gv11b_mmu_fault_id_to_eng_pbdma_id_and_veid(struct gk20a *g, | ||
57 | u32 mmu_fault_id, u32 *active_engine_id, u32 *veid, u32 *pbdma_id); | ||
58 | |||
59 | void gv11b_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist); | ||
60 | void gv11b_get_ch_runlist_entry(struct channel_gk20a *c, u32 *runlist); | ||
61 | int channel_gv11b_setup_ramfc(struct channel_gk20a *c, | ||
62 | u64 gpfifo_base, u32 gpfifo_entries, | ||
63 | unsigned long acquire_timeout, u32 flags); | ||
64 | u32 gv11b_userd_gp_get(struct gk20a *g, struct channel_gk20a *c); | ||
65 | u64 gv11b_userd_pb_get(struct gk20a *g, struct channel_gk20a *c); | ||
66 | void gv11b_userd_gp_put(struct gk20a *g, struct channel_gk20a *c); | ||
67 | void channel_gv11b_unbind(struct channel_gk20a *ch); | ||
68 | u32 gv11b_fifo_get_num_fifos(struct gk20a *g); | ||
69 | bool gv11b_is_fault_engine_subid_gpc(struct gk20a *g, u32 engine_subid); | ||
70 | void gv11b_dump_channel_status_ramfc(struct gk20a *g, | ||
71 | struct gk20a_debug_output *o, | ||
72 | u32 chid, | ||
73 | struct ch_state *ch_state); | ||
74 | void gv11b_dump_eng_status(struct gk20a *g, | ||
75 | struct gk20a_debug_output *o); | ||
76 | u32 gv11b_fifo_intr_0_error_mask(struct gk20a *g); | ||
77 | int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id, | ||
78 | unsigned int id_type, unsigned int timeout_rc_type); | ||
79 | int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid); | ||
80 | int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); | ||
81 | int gv11b_fifo_enable_tsg(struct tsg_gk20a *tsg); | ||
82 | int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, | ||
83 | unsigned int id_type, unsigned int timeout_rc_type); | ||
84 | void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, | ||
85 | u32 id, unsigned int id_type, unsigned int rc_type, | ||
86 | struct mmu_fault_info *mmfault); | ||
87 | void gv11b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f); | ||
88 | int gv11b_init_fifo_reset_enable_hw(struct gk20a *g); | ||
89 | bool gv11b_fifo_handle_sched_error(struct gk20a *g); | ||
90 | bool gv11b_fifo_handle_ctxsw_timeout(struct gk20a *g, u32 fifo_intr); | ||
91 | unsigned int gv11b_fifo_handle_pbdma_intr_0(struct gk20a *g, | ||
92 | u32 pbdma_id, u32 pbdma_intr_0, | ||
93 | u32 *handled, u32 *error_notifier); | ||
94 | unsigned int gv11b_fifo_handle_pbdma_intr_1(struct gk20a *g, | ||
95 | u32 pbdma_id, u32 pbdma_intr_1, | ||
96 | u32 *handled, u32 *error_notifier); | ||
97 | void gv11b_fifo_init_eng_method_buffers(struct gk20a *g, | ||
98 | struct tsg_gk20a *tsg); | ||
99 | void gv11b_fifo_deinit_eng_method_buffers(struct gk20a *g, | ||
100 | struct tsg_gk20a *tsg); | ||
101 | int gv11b_fifo_alloc_syncpt_buf(struct channel_gk20a *c, | ||
102 | u32 syncpt_id, struct nvgpu_mem *syncpt_buf); | ||
103 | void gv11b_fifo_free_syncpt_buf(struct channel_gk20a *c, | ||
104 | struct nvgpu_mem *syncpt_buf); | ||
105 | void gv11b_fifo_add_syncpt_wait_cmd(struct gk20a *g, | ||
106 | struct priv_cmd_entry *cmd, u32 off, | ||
107 | u32 id, u32 thresh, u64 gpu_va_base); | ||
108 | u32 gv11b_fifo_get_syncpt_wait_cmd_size(void); | ||
109 | void gv11b_fifo_add_syncpt_incr_cmd(struct gk20a *g, | ||
110 | bool wfi_cmd, struct priv_cmd_entry *cmd, | ||
111 | u32 id, u64 gpu_va_base); | ||
112 | u32 gv11b_fifo_get_syncpt_incr_cmd_size(bool wfi_cmd); | ||
113 | int gv11b_init_fifo_setup_hw(struct gk20a *g); | ||
114 | |||
115 | void gv11b_fifo_tsg_verify_status_faulted(struct channel_gk20a *ch); | ||
116 | u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g); | ||
117 | #endif | ||