diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2019-04-30 20:19:51 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2020-01-30 02:41:45 -0500 |
commit | dc281d6a9ebadaeb66dab092b40b7d6f4559ee39 (patch) | |
tree | cbe2c286c1549c2824eade89a25c033a86a7dd6e /drivers/gpu/nvgpu/gp10b | |
parent | 6e91ecaae77d769955e5e1f34ded90c064e9c245 (diff) |
gpu: nvgpu: add SET_CTX_MMU_DEBUG_MODE ioctl
Added NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE ioctl to set MMU
debug mode for a given context.
Added gr.set_mmu_debug_mode HAL to change NV_PGPC_PRI_MMU_DEBUG_CTRL
for a given channel. HAL implementation for native case is
gm20b_gr_set_mmu_debug_mode. It internally uses regops, which directly
writes to the register if the context is resident, or writes to
gr context otherwise.
Added NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE to enable the feature.
NV_PGPC_PRI_MMU_DEBUG_CTRL has to be context switched in FECS ucode,
so the feature is only enabled on TU104 for now.
Bug 2515097
But 2713590
Change-Id: Ib4efaf06fc47a8539b4474f94c68c20ce225263f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110720
(cherry-picked from commit af2ccb811d3de06f052b1dee39bd9ffa863ac8ce)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208767
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Kajetan Dutka <kdutka@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 561d24d8..eea40d5e 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP10B Tegra HAL interface | 2 | * GP10B Tegra HAL interface |
3 | * | 3 | * |
4 | * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -295,6 +295,7 @@ static const struct gpu_ops gp10b_ops = { | |||
295 | .get_lrf_tex_ltc_dram_override = get_ecc_override_val, | 295 | .get_lrf_tex_ltc_dram_override = get_ecc_override_val, |
296 | .update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode, | 296 | .update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode, |
297 | .update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode, | 297 | .update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode, |
298 | .set_mmu_debug_mode = NULL, | ||
298 | .record_sm_error_state = gm20b_gr_record_sm_error_state, | 299 | .record_sm_error_state = gm20b_gr_record_sm_error_state, |
299 | .clear_sm_error_state = gm20b_gr_clear_sm_error_state, | 300 | .clear_sm_error_state = gm20b_gr_clear_sm_error_state, |
300 | .suspend_contexts = gr_gp10b_suspend_contexts, | 301 | .suspend_contexts = gr_gp10b_suspend_contexts, |
@@ -783,6 +784,7 @@ int gp10b_init_hal(struct gk20a *g) | |||
783 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); | 784 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); |
784 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); | 785 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); |
785 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); | 786 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); |
787 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, false); | ||
786 | 788 | ||
787 | /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ | 789 | /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ |
788 | if (gops->fuse.check_priv_security(g)) { | 790 | if (gops->fuse.check_priv_security(g)) { |