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authorAlex Waterman <alexw@nvidia.com>2017-03-21 15:55:35 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-06 21:14:53 -0400
commitc9665079d7b12f22a847c62587724b4ee120ca6e (patch)
tree7882bd08193db4c34b3b8ad7df7013339da2fba1 /drivers/gpu/nvgpu/gp10b
parentb69020bff5dfa69cad926c9374cdbe9a62509ffd (diff)
gpu: nvgpu: rename mem_desc to nvgpu_mem
Renaming was done with the following command: $ find -type f | \ xargs sed -i 's/struct mem_desc/struct nvgpu_mem/g' Also rename mem_desc.[ch] to nvgpu_mem.[ch]. JIRA NVGPU-12 Change-Id: I69395758c22a56aa01e3dffbcded70a729bf559a Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1325547 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r--drivers/gpu/nvgpu/gp10b/fifo_gp10b.c4
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c12
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.h10
-rw-r--r--drivers/gpu/nvgpu/gp10b/mm_gp10b.c8
4 files changed, 17 insertions, 17 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
index 3787662b..a7e77232 100644
--- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
@@ -27,7 +27,7 @@
27#include <nvgpu/hw/gp10b/hw_top_gp10b.h> 27#include <nvgpu/hw/gp10b/hw_top_gp10b.h>
28 28
29static void gp10b_set_pdb_fault_replay_flags(struct gk20a *g, 29static void gp10b_set_pdb_fault_replay_flags(struct gk20a *g,
30 struct mem_desc *mem) 30 struct nvgpu_mem *mem)
31{ 31{
32 u32 val; 32 u32 val;
33 33
@@ -83,7 +83,7 @@ static int channel_gp10b_setup_ramfc(struct channel_gk20a *c,
83 unsigned long acquire_timeout, u32 flags) 83 unsigned long acquire_timeout, u32 flags)
84{ 84{
85 struct gk20a *g = c->g; 85 struct gk20a *g = c->g;
86 struct mem_desc *mem = &c->inst_block; 86 struct nvgpu_mem *mem = &c->inst_block;
87 87
88 gk20a_dbg_fn(""); 88 gk20a_dbg_fn("");
89 89
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index fc831e75..8e1517f6 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -832,7 +832,7 @@ static int gr_gp10b_init_ctx_state(struct gk20a *g)
832} 832}
833 833
834int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size, 834int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size,
835 struct mem_desc *mem) 835 struct nvgpu_mem *mem)
836{ 836{
837 int err; 837 int err;
838 838
@@ -1037,7 +1037,7 @@ fail_free_gk20a_ctx:
1037static void dump_ctx_switch_stats(struct gk20a *g, struct vm_gk20a *vm, 1037static void dump_ctx_switch_stats(struct gk20a *g, struct vm_gk20a *vm,
1038 struct gr_ctx_desc *gr_ctx) 1038 struct gr_ctx_desc *gr_ctx)
1039{ 1039{
1040 struct mem_desc *mem = &gr_ctx->mem; 1040 struct nvgpu_mem *mem = &gr_ctx->mem;
1041 1041
1042 if (nvgpu_mem_begin(g, mem)) { 1042 if (nvgpu_mem_begin(g, mem)) {
1043 WARN_ON("Cannot map context"); 1043 WARN_ON("Cannot map context");
@@ -1108,7 +1108,7 @@ static void gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
1108 1108
1109static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, 1109static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g,
1110 struct channel_ctx_gk20a *ch_ctx, 1110 struct channel_ctx_gk20a *ch_ctx,
1111 struct mem_desc *mem) 1111 struct nvgpu_mem *mem)
1112{ 1112{
1113 struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx; 1113 struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx;
1114 u32 gfxp_preempt_option = 1114 u32 gfxp_preempt_option =
@@ -2072,7 +2072,7 @@ static int gr_gp10b_set_boosted_ctx(struct channel_gk20a *ch,
2072{ 2072{
2073 struct gr_ctx_desc *gr_ctx = ch->ch_ctx.gr_ctx; 2073 struct gr_ctx_desc *gr_ctx = ch->ch_ctx.gr_ctx;
2074 struct gk20a *g = ch->g; 2074 struct gk20a *g = ch->g;
2075 struct mem_desc *mem = &gr_ctx->mem; 2075 struct nvgpu_mem *mem = &gr_ctx->mem;
2076 int err = 0; 2076 int err = 0;
2077 2077
2078 gr_ctx->boosted_ctx = boost; 2078 gr_ctx->boosted_ctx = boost;
@@ -2101,7 +2101,7 @@ unmap_ctx:
2101 return err; 2101 return err;
2102} 2102}
2103 2103
2104static void gr_gp10b_update_boosted_ctx(struct gk20a *g, struct mem_desc *mem, 2104static void gr_gp10b_update_boosted_ctx(struct gk20a *g, struct nvgpu_mem *mem,
2105 struct gr_ctx_desc *gr_ctx) { 2105 struct gr_ctx_desc *gr_ctx) {
2106 u32 v; 2106 u32 v;
2107 2107
@@ -2119,7 +2119,7 @@ static int gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
2119 struct gk20a *g = ch->g; 2119 struct gk20a *g = ch->g;
2120 struct tsg_gk20a *tsg; 2120 struct tsg_gk20a *tsg;
2121 struct vm_gk20a *vm; 2121 struct vm_gk20a *vm;
2122 struct mem_desc *mem = &gr_ctx->mem; 2122 struct nvgpu_mem *mem = &gr_ctx->mem;
2123 u32 class; 2123 u32 class;
2124 int err = 0; 2124 int err = 0;
2125 2125
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
index ffb15d91..c4c206c3 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
@@ -42,7 +42,7 @@ enum {
42void gp10b_init_gr(struct gpu_ops *ops); 42void gp10b_init_gr(struct gpu_ops *ops);
43int gr_gp10b_init_fs_state(struct gk20a *g); 43int gr_gp10b_init_fs_state(struct gk20a *g);
44int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size, 44int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size,
45 struct mem_desc *mem); 45 struct nvgpu_mem *mem);
46void gr_gp10b_create_sysfs(struct device *dev); 46void gr_gp10b_create_sysfs(struct device *dev);
47 47
48struct ecc_stat { 48struct ecc_stat {
@@ -95,10 +95,10 @@ struct gr_t18x {
95}; 95};
96 96
97struct gr_ctx_desc_t18x { 97struct gr_ctx_desc_t18x {
98 struct mem_desc preempt_ctxsw_buffer; 98 struct nvgpu_mem preempt_ctxsw_buffer;
99 struct mem_desc spill_ctxsw_buffer; 99 struct nvgpu_mem spill_ctxsw_buffer;
100 struct mem_desc betacb_ctxsw_buffer; 100 struct nvgpu_mem betacb_ctxsw_buffer;
101 struct mem_desc pagepool_ctxsw_buffer; 101 struct nvgpu_mem pagepool_ctxsw_buffer;
102 u32 ctx_id; 102 u32 ctx_id;
103 bool ctx_id_valid; 103 bool ctx_id_valid;
104 bool cilp_preempt_pending; 104 bool cilp_preempt_pending;
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 8c6340f0..a0dc8c55 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -34,7 +34,7 @@ static u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g)
34static int gp10b_init_mm_setup_hw(struct gk20a *g) 34static int gp10b_init_mm_setup_hw(struct gk20a *g)
35{ 35{
36 struct mm_gk20a *mm = &g->mm; 36 struct mm_gk20a *mm = &g->mm;
37 struct mem_desc *inst_block = &mm->bar1.inst_block; 37 struct nvgpu_mem *inst_block = &mm->bar1.inst_block;
38 int err = 0; 38 int err = 0;
39 39
40 gk20a_dbg_fn(""); 40 gk20a_dbg_fn("");
@@ -68,7 +68,7 @@ static int gb10b_init_bar2_vm(struct gk20a *g)
68 int err; 68 int err;
69 struct mm_gk20a *mm = &g->mm; 69 struct mm_gk20a *mm = &g->mm;
70 struct vm_gk20a *vm = &mm->bar2.vm; 70 struct vm_gk20a *vm = &mm->bar2.vm;
71 struct mem_desc *inst_block = &mm->bar2.inst_block; 71 struct nvgpu_mem *inst_block = &mm->bar2.inst_block;
72 u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; 72 u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size;
73 73
74 /* BAR2 aperture size is 32MB */ 74 /* BAR2 aperture size is 32MB */
@@ -96,7 +96,7 @@ clean_up_va:
96static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g) 96static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g)
97{ 97{
98 struct mm_gk20a *mm = &g->mm; 98 struct mm_gk20a *mm = &g->mm;
99 struct mem_desc *inst_block = &mm->bar2.inst_block; 99 struct nvgpu_mem *inst_block = &mm->bar2.inst_block;
100 u64 inst_pa = gk20a_mm_inst_block_addr(g, inst_block); 100 u64 inst_pa = gk20a_mm_inst_block_addr(g, inst_block);
101 101
102 gk20a_dbg_fn(""); 102 gk20a_dbg_fn("");
@@ -375,7 +375,7 @@ static const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g,
375 return gp10b_mm_levels; 375 return gp10b_mm_levels;
376} 376}
377 377
378static void gp10b_mm_init_pdb(struct gk20a *g, struct mem_desc *inst_block, 378static void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block,
379 struct vm_gk20a *vm) 379 struct vm_gk20a *vm)
380{ 380{
381 u64 pdb_addr = gk20a_mem_get_base_addr(g, &vm->pdb.mem, 0); 381 u64 pdb_addr = gk20a_mem_get_base_addr(g, &vm->pdb.mem, 0);