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authorSunny He <suhe@nvidia.com>2017-06-27 16:42:33 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-13 03:09:08 -0400
commite78153ea1b6b610f2307b86fc42ea33d678b250f (patch)
tree004e16c6b81c4b209cc2714e8722209db92edc2c /drivers/gpu/nvgpu/gp10b/mc_gp10b.h
parentecf67ebbf69a9ab6481b1517b8920f7ac5828bb5 (diff)
gpu: nvgpu: Reorg mc HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the mc sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I26d74c14661a193af7e8d90dd672b73010e5f841 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1509601 GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/mc_gp10b.h')
-rw-r--r--drivers/gpu/nvgpu/gp10b/mc_gp10b.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
index ceba0b39..00e9dd1d 100644
--- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
@@ -20,9 +20,18 @@ enum MC_INTERRUPT_REGLIST {
20 NVGPU_MC_INTR_NONSTALLING, 20 NVGPU_MC_INTR_NONSTALLING,
21}; 21};
22 22
23void gp10b_init_mc(struct gpu_ops *gops);
24void mc_gp10b_intr_enable(struct gk20a *g); 23void mc_gp10b_intr_enable(struct gk20a *g);
25void mc_gp10b_intr_unit_config(struct gk20a *g, bool enable, 24void mc_gp10b_intr_unit_config(struct gk20a *g, bool enable,
26 bool is_stalling, u32 mask); 25 bool is_stalling, u32 mask);
27void mc_gp10b_isr_stall(struct gk20a *g); 26void mc_gp10b_isr_stall(struct gk20a *g);
27bool mc_gp10b_is_intr1_pending(struct gk20a *g,
28 enum nvgpu_unit unit, u32 mc_intr_1);
29
30u32 mc_gp10b_intr_stall(struct gk20a *g);
31void mc_gp10b_intr_stall_pause(struct gk20a *g);
32void mc_gp10b_intr_stall_resume(struct gk20a *g);
33u32 mc_gp10b_intr_nonstall(struct gk20a *g);
34void mc_gp10b_intr_nonstall_pause(struct gk20a *g);
35void mc_gp10b_intr_nonstall_resume(struct gk20a *g);
36
28#endif 37#endif