From e78153ea1b6b610f2307b86fc42ea33d678b250f Mon Sep 17 00:00:00 2001 From: Sunny He Date: Tue, 27 Jun 2017 13:42:33 -0700 Subject: gpu: nvgpu: Reorg mc HAL initialization Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the mc sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I26d74c14661a193af7e8d90dd672b73010e5f841 Signed-off-by: Sunny He Reviewed-on: https://git-master.nvidia.com/r/1509601 GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao Reviewed-by: Alex Waterman Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gp10b/mc_gp10b.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gp10b/mc_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h index ceba0b39..00e9dd1d 100644 --- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h @@ -20,9 +20,18 @@ enum MC_INTERRUPT_REGLIST { NVGPU_MC_INTR_NONSTALLING, }; -void gp10b_init_mc(struct gpu_ops *gops); void mc_gp10b_intr_enable(struct gk20a *g); void mc_gp10b_intr_unit_config(struct gk20a *g, bool enable, bool is_stalling, u32 mask); void mc_gp10b_isr_stall(struct gk20a *g); +bool mc_gp10b_is_intr1_pending(struct gk20a *g, + enum nvgpu_unit unit, u32 mc_intr_1); + +u32 mc_gp10b_intr_stall(struct gk20a *g); +void mc_gp10b_intr_stall_pause(struct gk20a *g); +void mc_gp10b_intr_stall_resume(struct gk20a *g); +u32 mc_gp10b_intr_nonstall(struct gk20a *g); +void mc_gp10b_intr_nonstall_pause(struct gk20a *g); +void mc_gp10b_intr_nonstall_resume(struct gk20a *g); + #endif -- cgit v1.2.2