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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-03-23 11:41:04 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:16 -0500
commit3d0f9a751784ac9eb27f9f989f3b584ff5dc8f17 (patch)
tree4c1df46e81b17f47ddc8731beb95c7f351de7788 /drivers/gpu/nvgpu/gp106/pmu_gp106.c
parent21eda905ea69a0e090f6e29c444a9129c65f0b1f (diff)
gpu: nvgpu: Add support for gp104 and gp106
Add support for chips gp104 and gp106. Change-Id: Ied5f239bdd0ec85245bce1fb6ef51330871d0f05 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120465 GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams <kadams@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/pmu_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_gp106.c46
1 files changed, 46 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
new file mode 100644
index 00000000..a9d05730
--- /dev/null
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
@@ -0,0 +1,46 @@
1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#include <linux/delay.h> /* for udelay */
15#include "gk20a/gk20a.h"
16#include "gk20a/pmu_gk20a.h"
17
18#include "gp10b/pmu_gp10b.h"
19#include "hw_mc_gp106.h"
20#include "hw_pwr_gp106.h"
21
22int gp106_pmu_reset(struct gk20a *g)
23{
24 gk20a_dbg_fn("");
25
26 gk20a_reset(g, mc_enable_pwr_enabled_f());
27
28 gk20a_writel(g, pwr_falcon_engine_r(),
29 pwr_falcon_engine_reset_true_f());
30 udelay(10);
31 gk20a_writel(g, pwr_falcon_engine_r(),
32 pwr_falcon_engine_reset_false_f());
33
34 gk20a_dbg_fn("done");
35 return 0;
36}
37
38void gp106_init_pmu_ops(struct gpu_ops *gops)
39{
40 gk20a_dbg_fn("");
41
42 gp10b_init_pmu_ops(gops);
43 gops->pmu.reset = gp106_pmu_reset;
44
45 gk20a_dbg_fn("done");
46}