From 3d0f9a751784ac9eb27f9f989f3b584ff5dc8f17 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 23 Mar 2016 08:41:04 -0700 Subject: gpu: nvgpu: Add support for gp104 and gp106 Add support for chips gp104 and gp106. Change-Id: Ied5f239bdd0ec85245bce1fb6ef51330871d0f05 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1120465 GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams --- drivers/gpu/nvgpu/gp106/pmu_gp106.c | 46 +++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 drivers/gpu/nvgpu/gp106/pmu_gp106.c (limited to 'drivers/gpu/nvgpu/gp106/pmu_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c new file mode 100644 index 00000000..a9d05730 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include /* for udelay */ +#include "gk20a/gk20a.h" +#include "gk20a/pmu_gk20a.h" + +#include "gp10b/pmu_gp10b.h" +#include "hw_mc_gp106.h" +#include "hw_pwr_gp106.h" + +int gp106_pmu_reset(struct gk20a *g) +{ + gk20a_dbg_fn(""); + + gk20a_reset(g, mc_enable_pwr_enabled_f()); + + gk20a_writel(g, pwr_falcon_engine_r(), + pwr_falcon_engine_reset_true_f()); + udelay(10); + gk20a_writel(g, pwr_falcon_engine_r(), + pwr_falcon_engine_reset_false_f()); + + gk20a_dbg_fn("done"); + return 0; +} + +void gp106_init_pmu_ops(struct gpu_ops *gops) +{ + gk20a_dbg_fn(""); + + gp10b_init_pmu_ops(gops); + gops->pmu.reset = gp106_pmu_reset; + + gk20a_dbg_fn("done"); +} -- cgit v1.2.2