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authorSrirangan <smadhavan@nvidia.com>2018-08-27 01:59:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-29 11:59:35 -0400
commite3710e5431d8f14f1b8c2812f5c1aeeb7bdaac1c (patch)
tree8a6498b12e10f6b391d3c5dd7c6ac7b340ca60b4 /drivers/gpu/nvgpu/gp106/hal_gp106.c
parent2f97e683feed3c3ba3c8722c4f6ab7466bcef0c0 (diff)
gpu: nvgpu: gp106: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces, introducing the braces. JIRA NVGPU-671 Change-Id: I8493274995ed8de526902dd0ca0808b2972e28aa Signed-off-by: Srirangan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1796806 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/hal_gp106.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index f3b5dd87..9c42ac3a 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -224,8 +224,9 @@ static int gp106_init_gpu_characteristics(struct gk20a *g)
224 int err; 224 int err;
225 225
226 err = gk20a_init_gpu_characteristics(g); 226 err = gk20a_init_gpu_characteristics(g);
227 if (err) 227 if (err) {
228 return err; 228 return err;
229 }
229 230
230 __nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_VOLTAGE, true); 231 __nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_VOLTAGE, true);
231 __nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_CURRENT, true); 232 __nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_CURRENT, true);
@@ -868,8 +869,10 @@ int gp106_init_hal(struct gk20a *g)
868 __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); 869 __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false);
869 870
870 /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ 871 /* Read fuses to check if gpu needs to boot in secure/non-secure mode */
871 if (gops->fuse.check_priv_security(g)) 872 if (gops->fuse.check_priv_security(g)) {
872 return -EINVAL; /* Do not boot gpu */ 873 /* Do not boot gpu */
874 return -EINVAL;
875 }
873 876
874 g->pmu_lsf_pmu_wpr_init_done = 0; 877 g->pmu_lsf_pmu_wpr_init_done = 0;
875 g->bootstrap_owner = LSF_FALCON_ID_SEC2; 878 g->bootstrap_owner = LSF_FALCON_ID_SEC2;