From e3710e5431d8f14f1b8c2812f5c1aeeb7bdaac1c Mon Sep 17 00:00:00 2001 From: Srirangan Date: Mon, 27 Aug 2018 11:29:01 +0530 Subject: gpu: nvgpu: gp106: Fix MISRA 15.6 violations MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces, introducing the braces. JIRA NVGPU-671 Change-Id: I8493274995ed8de526902dd0ca0808b2972e28aa Signed-off-by: Srirangan Reviewed-on: https://git-master.nvidia.com/r/1796806 Reviewed-by: svc-misra-checker Reviewed-by: Konsta Holtta GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp106/hal_gp106.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index f3b5dd87..9c42ac3a 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -224,8 +224,9 @@ static int gp106_init_gpu_characteristics(struct gk20a *g) int err; err = gk20a_init_gpu_characteristics(g); - if (err) + if (err) { return err; + } __nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_VOLTAGE, true); __nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_CURRENT, true); @@ -868,8 +869,10 @@ int gp106_init_hal(struct gk20a *g) __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ - if (gops->fuse.check_priv_security(g)) - return -EINVAL; /* Do not boot gpu */ + if (gops->fuse.check_priv_security(g)) { + /* Do not boot gpu */ + return -EINVAL; + } g->pmu_lsf_pmu_wpr_init_done = 0; g->bootstrap_owner = LSF_FALCON_ID_SEC2; -- cgit v1.2.2