diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-06-28 06:53:18 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-03 06:16:55 -0400 |
commit | 2f712e22303471b8dd2f9388c874d12b07aed258 (patch) | |
tree | c6898c29860abc2970028fd6da60002819fb6488 /drivers/gpu/nvgpu/gp106/flcn_gp106.c | |
parent | d2486cf1b1d0b0e3306ba6eb0a8b6573fa27d03e (diff) |
gpu: nvgpu: falcon HAL to support SEC2
- Updated falcon controller HAL to support SEC2 falcon
& used "is_falcon_supported" flag to know the support on chip.
- Created falcon HAL flcn_gp106.c/h under gp106 to enable
support for SEC2 & inherited gk20a flcn support.
- Deleted SEC2 falcon related methods to make use of
generic flacon controller methods for SEC2.
- GP106 SEC2 code cleanup
NVPU JIRA-99
Change-Id: I846e8015ed33554b3d8a45795314f1d28eee482f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1510200
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/flcn_gp106.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/flcn_gp106.c | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/flcn_gp106.c b/drivers/gpu/nvgpu/gp106/flcn_gp106.c new file mode 100644 index 00000000..6ae0b7af --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/flcn_gp106.c | |||
@@ -0,0 +1,85 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | #include "gk20a/gk20a.h" | ||
14 | #include "gk20a/flcn_gk20a.h" | ||
15 | #include "gp106/sec2_gp106.h" | ||
16 | |||
17 | #include <nvgpu/hw/gp106/hw_falcon_gp106.h> | ||
18 | |||
19 | static void gp106_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn) | ||
20 | { | ||
21 | struct nvgpu_falcon_engine_dependency_ops *flcn_eng_dep_ops = | ||
22 | &flcn->flcn_engine_dep_ops; | ||
23 | |||
24 | switch (flcn->flcn_id) { | ||
25 | case FALCON_ID_PMU: | ||
26 | flcn_eng_dep_ops->reset_eng = nvgpu_pmu_reset; | ||
27 | break; | ||
28 | case FALCON_ID_SEC2: | ||
29 | flcn_eng_dep_ops->reset_eng = gp106_sec2_reset; | ||
30 | break; | ||
31 | default: | ||
32 | flcn_eng_dep_ops->reset_eng = NULL; | ||
33 | break; | ||
34 | } | ||
35 | } | ||
36 | |||
37 | static void gp106_falcon_ops(struct nvgpu_falcon *flcn) | ||
38 | { | ||
39 | gk20a_falcon_ops(flcn); | ||
40 | gp106_falcon_engine_dependency_ops(flcn); | ||
41 | } | ||
42 | |||
43 | static void gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn) | ||
44 | { | ||
45 | struct gk20a *g = flcn->g; | ||
46 | |||
47 | switch (flcn->flcn_id) { | ||
48 | case FALCON_ID_PMU: | ||
49 | flcn->flcn_base = FALCON_PWR_BASE; | ||
50 | flcn->is_falcon_supported = true; | ||
51 | flcn->is_interrupt_enabled = true; | ||
52 | break; | ||
53 | case FALCON_ID_SEC2: | ||
54 | flcn->flcn_base = FALCON_SEC_BASE; | ||
55 | flcn->is_falcon_supported = true; | ||
56 | flcn->is_interrupt_enabled = false; | ||
57 | break; | ||
58 | case FALCON_ID_FECS: | ||
59 | flcn->flcn_base = FALCON_FECS_BASE; | ||
60 | flcn->is_falcon_supported = true; | ||
61 | flcn->is_interrupt_enabled = false; | ||
62 | break; | ||
63 | case FALCON_ID_GPCCS: | ||
64 | flcn->flcn_base = FALCON_GPCCS_BASE; | ||
65 | flcn->is_falcon_supported = true; | ||
66 | flcn->is_interrupt_enabled = false; | ||
67 | break; | ||
68 | default: | ||
69 | flcn->is_falcon_supported = false; | ||
70 | nvgpu_err(g, "Invalid flcn request"); | ||
71 | break; | ||
72 | } | ||
73 | |||
74 | if (flcn->is_falcon_supported) { | ||
75 | nvgpu_mutex_init(&flcn->copy_lock); | ||
76 | gp106_falcon_ops(flcn); | ||
77 | } else | ||
78 | nvgpu_info(g, "falcon 0x%x not supported on %s", | ||
79 | flcn->flcn_id, g->name); | ||
80 | } | ||
81 | |||
82 | void gp106_falcon_init_hal(struct gpu_ops *gops) | ||
83 | { | ||
84 | gops->falcon.falcon_hal_sw_init = gp106_falcon_hal_sw_init; | ||
85 | } | ||