diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-06 18:13:54 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-16 13:57:48 -0400 |
commit | 211edaefb71d06d34c2835a93249da58673bff8a (patch) | |
tree | 3bd5eed1cc9020fcc8af4e4ffd9653268d59eb9b /drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h | |
parent | 3a1321ddcd33accd6a8a6efee2921ebf088b0f50 (diff) |
gpu: nvgpu: Fix CWD floorsweep programming
Program CWD TPC and SM registers correctly. The old code did not work
when there are more than 4 TPCs.
Refactor init_fs_mask to reduce code duplication.
Change-Id: Id93c1f8df24f1b7ee60314c3204e288b91951a88
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1143697
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h index 73861c07..45240e97 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h | |||
@@ -1962,10 +1962,22 @@ static inline u32 gr_cwd_gpc_tpc_id_r(u32 i) | |||
1962 | { | 1962 | { |
1963 | return 0x00405b60 + i*4; | 1963 | return 0x00405b60 + i*4; |
1964 | } | 1964 | } |
1965 | static inline u32 gr_cwd_gpc_tpc_id_tpc0_s(void) | ||
1966 | { | ||
1967 | return 4; | ||
1968 | } | ||
1965 | static inline u32 gr_cwd_gpc_tpc_id_tpc0_f(u32 v) | 1969 | static inline u32 gr_cwd_gpc_tpc_id_tpc0_f(u32 v) |
1966 | { | 1970 | { |
1967 | return (v & 0xf) << 0; | 1971 | return (v & 0xf) << 0; |
1968 | } | 1972 | } |
1973 | static inline u32 gr_cwd_gpc_tpc_id_gpc0_s(void) | ||
1974 | { | ||
1975 | return 4; | ||
1976 | } | ||
1977 | static inline u32 gr_cwd_gpc_tpc_id_gpc0_f(u32 v) | ||
1978 | { | ||
1979 | return (v & 0xf) << 4; | ||
1980 | } | ||
1969 | static inline u32 gr_cwd_gpc_tpc_id_tpc1_f(u32 v) | 1981 | static inline u32 gr_cwd_gpc_tpc_id_tpc1_f(u32 v) |
1970 | { | 1982 | { |
1971 | return (v & 0xf) << 8; | 1983 | return (v & 0xf) << 8; |
@@ -1974,6 +1986,10 @@ static inline u32 gr_cwd_sm_id_r(u32 i) | |||
1974 | { | 1986 | { |
1975 | return 0x00405ba0 + i*4; | 1987 | return 0x00405ba0 + i*4; |
1976 | } | 1988 | } |
1989 | static inline u32 gr_cwd_sm_id__size_1_v(void) | ||
1990 | { | ||
1991 | return 0x00000006; | ||
1992 | } | ||
1977 | static inline u32 gr_cwd_sm_id_tpc0_f(u32 v) | 1993 | static inline u32 gr_cwd_sm_id_tpc0_f(u32 v) |
1978 | { | 1994 | { |
1979 | return (v & 0xff) << 0; | 1995 | return (v & 0xff) << 0; |