diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-06-22 15:58:43 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-30 21:34:58 -0400 |
commit | 82c0c96290602b1baf296133c7f55ae1848e433a (patch) | |
tree | 1f32dc8571ce777c50984be1194c68ddeea73b38 /drivers/gpu/nvgpu/gk20a/regops_gk20a.c | |
parent | 3ffcadc8dd6152d4ce2677b4e5d8e043a3df58ac (diff) |
gpu: nvgpu: Remove gk20a support
Remove gk20a support. Leave only gk20a code which is reused by other
GPUs.
JIRA NVGPU-38
Change-Id: I3d5f2bc9f71cd9f161e64436561a5eadd5786a3b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master/r/1507927
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/regops_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/regops_gk20a.c | 137 |
1 files changed, 1 insertions, 136 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c index 9919fc3d..aee8677c 100644 --- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Tegra GK20A GPU Debugger Driver Register Ops | 2 | * Tegra GK20A GPU Debugger Driver Register Ops |
3 | * | 3 | * |
4 | * Copyright (c) 2013-2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2013-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -729,138 +729,3 @@ bool is_bar0_global_offset_whitelisted_gk20a(struct gk20a *g, u32 offset) | |||
729 | regop_bsearch_range_cmp); | 729 | regop_bsearch_range_cmp); |
730 | return valid; | 730 | return valid; |
731 | } | 731 | } |
732 | |||
733 | static const struct regop_offset_range *gk20a_get_global_whitelist_ranges(void) | ||
734 | { | ||
735 | return gk20a_global_whitelist_ranges; | ||
736 | } | ||
737 | |||
738 | static int gk20a_get_global_whitelist_ranges_count(void) | ||
739 | { | ||
740 | return gk20a_global_whitelist_ranges_count; | ||
741 | } | ||
742 | |||
743 | static const struct regop_offset_range *gk20a_get_context_whitelist_ranges(void) | ||
744 | { | ||
745 | return gk20a_context_whitelist_ranges; | ||
746 | } | ||
747 | |||
748 | static int gk20a_get_context_whitelist_ranges_count(void) | ||
749 | { | ||
750 | return gk20a_context_whitelist_ranges_count; | ||
751 | } | ||
752 | |||
753 | static const u32 *gk20a_get_runcontrol_whitelist(void) | ||
754 | { | ||
755 | return gk20a_runcontrol_whitelist; | ||
756 | } | ||
757 | |||
758 | static int gk20a_get_runcontrol_whitelist_count(void) | ||
759 | { | ||
760 | return gk20a_runcontrol_whitelist_count; | ||
761 | } | ||
762 | |||
763 | static const | ||
764 | struct regop_offset_range *gk20a_get_runcontrol_whitelist_ranges(void) | ||
765 | { | ||
766 | return gk20a_runcontrol_whitelist_ranges; | ||
767 | } | ||
768 | |||
769 | static int gk20a_get_runcontrol_whitelist_ranges_count(void) | ||
770 | { | ||
771 | return gk20a_runcontrol_whitelist_ranges_count; | ||
772 | } | ||
773 | |||
774 | static const u32 *gk20a_get_qctl_whitelist(void) | ||
775 | { | ||
776 | return gk20a_qctl_whitelist; | ||
777 | } | ||
778 | |||
779 | static int gk20a_get_qctl_whitelist_count(void) | ||
780 | { | ||
781 | return gk20a_qctl_whitelist_count; | ||
782 | } | ||
783 | |||
784 | static const struct regop_offset_range *gk20a_get_qctl_whitelist_ranges(void) | ||
785 | { | ||
786 | return gk20a_qctl_whitelist_ranges; | ||
787 | } | ||
788 | |||
789 | static int gk20a_get_qctl_whitelist_ranges_count(void) | ||
790 | { | ||
791 | return gk20a_qctl_whitelist_ranges_count; | ||
792 | } | ||
793 | |||
794 | static int gk20a_apply_smpc_war(struct dbg_session_gk20a *dbg_s) | ||
795 | { | ||
796 | /* The following regops are a hack/war to make up for the fact that we | ||
797 | * just scribbled into the ctxsw image w/o really knowing whether | ||
798 | * it was already swapped out in/out once or not, etc. | ||
799 | */ | ||
800 | struct nvgpu_dbg_gpu_reg_op ops[4]; | ||
801 | unsigned int i; | ||
802 | |||
803 | for (i = 0; i < ARRAY_SIZE(ops); i++) { | ||
804 | ops[i].op = REGOP(WRITE_32); | ||
805 | ops[i].type = REGOP(TYPE_GR_CTX); | ||
806 | ops[i].status = REGOP(STATUS_SUCCESS); | ||
807 | ops[i].value_hi = 0; | ||
808 | ops[i].and_n_mask_lo = 0; | ||
809 | ops[i].and_n_mask_hi = 0; | ||
810 | } | ||
811 | |||
812 | /* gr_pri_gpcs_tpcs_sm_dsm_perf_counter_control_sel1_r();*/ | ||
813 | ops[0].offset = 0x00419e08; | ||
814 | ops[0].value_lo = 0x1d; | ||
815 | |||
816 | /* gr_pri_gpcs_tpcs_sm_dsm_perf_counter_control5_r(); */ | ||
817 | ops[1].offset = 0x00419e58; | ||
818 | ops[1].value_lo = 0x1; | ||
819 | |||
820 | /* gr_pri_gpcs_tpcs_sm_dsm_perf_counter_control3_r(); */ | ||
821 | ops[2].offset = 0x00419e68; | ||
822 | ops[2].value_lo = 0xaaaa; | ||
823 | |||
824 | /* gr_pri_gpcs_tpcs_sm_dsm_perf_counter4_control_r(); */ | ||
825 | ops[3].offset = 0x00419f40; | ||
826 | ops[3].value_lo = 0x18; | ||
827 | |||
828 | return dbg_s->g->ops.dbg_session_ops.exec_reg_ops(dbg_s, ops, | ||
829 | ARRAY_SIZE(ops)); | ||
830 | } | ||
831 | |||
832 | void gk20a_init_regops(struct gpu_ops *gops) | ||
833 | { | ||
834 | gops->regops.get_global_whitelist_ranges = | ||
835 | gk20a_get_global_whitelist_ranges; | ||
836 | gops->regops.get_global_whitelist_ranges_count = | ||
837 | gk20a_get_global_whitelist_ranges_count; | ||
838 | |||
839 | gops->regops.get_context_whitelist_ranges = | ||
840 | gk20a_get_context_whitelist_ranges; | ||
841 | gops->regops.get_context_whitelist_ranges_count = | ||
842 | gk20a_get_context_whitelist_ranges_count; | ||
843 | |||
844 | gops->regops.get_runcontrol_whitelist = | ||
845 | gk20a_get_runcontrol_whitelist; | ||
846 | gops->regops.get_runcontrol_whitelist_count = | ||
847 | gk20a_get_runcontrol_whitelist_count; | ||
848 | |||
849 | gops->regops.get_runcontrol_whitelist_ranges = | ||
850 | gk20a_get_runcontrol_whitelist_ranges; | ||
851 | gops->regops.get_runcontrol_whitelist_ranges_count = | ||
852 | gk20a_get_runcontrol_whitelist_ranges_count; | ||
853 | |||
854 | gops->regops.get_qctl_whitelist = | ||
855 | gk20a_get_qctl_whitelist; | ||
856 | gops->regops.get_qctl_whitelist_count = | ||
857 | gk20a_get_qctl_whitelist_count; | ||
858 | |||
859 | gops->regops.get_qctl_whitelist_ranges = | ||
860 | gk20a_get_qctl_whitelist_ranges; | ||
861 | gops->regops.get_qctl_whitelist_ranges_count = | ||
862 | gk20a_get_qctl_whitelist_ranges_count; | ||
863 | |||
864 | gops->regops.apply_smpc_war = | ||
865 | gk20a_apply_smpc_war; | ||
866 | } | ||