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authorAingara Paramakuru <aparamakuru@nvidia.com>2016-02-25 14:19:24 -0500
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-03-22 13:42:45 -0400
commit82da6ed595a87c8a3038eecd75880ab21dd4c5de (patch)
tree03e1e1f13c3eaf5d21c1d49362853362634835c9 /drivers/gpu/nvgpu/gk20a/gk20a.h
parent032efd066ec4a8034204b6a34663ab2cac582fbe (diff)
gpu: nvgpu: add support to set channel timeslice
As part of improving GPU scheduling, userspace can now set a channel's timeslice, within reasonable limits imposed by the kernel driver. JIRA VFND-1312 Bug 1729664 Change-Id: I4c3430c43437889b8685f12988d4b967bb7877bb Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/1020917 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index faccf04a..8b87c7aa 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -269,6 +269,8 @@ struct gpu_ops {
269 int (*set_runlist_interleave)(struct gk20a *g, u32 id, 269 int (*set_runlist_interleave)(struct gk20a *g, u32 id,
270 bool is_tsg, u32 runlist_id, 270 bool is_tsg, u32 runlist_id,
271 u32 new_level); 271 u32 new_level);
272 int (*channel_set_timeslice)(struct channel_gk20a *ch,
273 u32 timeslice);
272 } fifo; 274 } fifo;
273 struct pmu_v { 275 struct pmu_v {
274 /*used for change of enum zbc update cmd id from ver 0 to ver1*/ 276 /*used for change of enum zbc update cmd id from ver 0 to ver1*/