From 82da6ed595a87c8a3038eecd75880ab21dd4c5de Mon Sep 17 00:00:00 2001 From: Aingara Paramakuru Date: Thu, 25 Feb 2016 14:19:24 -0500 Subject: gpu: nvgpu: add support to set channel timeslice As part of improving GPU scheduling, userspace can now set a channel's timeslice, within reasonable limits imposed by the kernel driver. JIRA VFND-1312 Bug 1729664 Change-Id: I4c3430c43437889b8685f12988d4b967bb7877bb Signed-off-by: Aingara Paramakuru Reviewed-on: http://git-master/r/1020917 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gk20a.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index faccf04a..8b87c7aa 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -269,6 +269,8 @@ struct gpu_ops { int (*set_runlist_interleave)(struct gk20a *g, u32 id, bool is_tsg, u32 runlist_id, u32 new_level); + int (*channel_set_timeslice)(struct channel_gk20a *ch, + u32 timeslice); } fifo; struct pmu_v { /*used for change of enum zbc update cmd id from ver 0 to ver1*/ -- cgit v1.2.2