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author | Seema Khowala <seemaj@nvidia.com> | 2017-07-02 20:04:05 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-05 06:07:00 -0400 |
commit | 5e17dc9419c05188646aeaec93fa83b3f80ac60d (patch) | |
tree | 89fa74c98efaa6396fc340a4c9284d1a2e07b102 /drivers/gpu/nvgpu/gk20a/gk20a.h | |
parent | 1ab0eec6eae303fa2b2f7cc97b78aed4a9f895e5 (diff) |
gpu: nvgpu: add resume_all_sms gr ops
This is required to support multiple SM and t19x
sm register address changes
JIRA GPUT19X-75
Change-Id: I844b5cf02a75ba397891a1100d917875e5a3e181
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1512217
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index aae54cc2..7dd4a9fa 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -377,6 +377,7 @@ struct gpu_ops { | |||
377 | u32 global_esr_mask, bool check_errors); | 377 | u32 global_esr_mask, bool check_errors); |
378 | void (*resume_single_sm)(struct gk20a *g, | 378 | void (*resume_single_sm)(struct gk20a *g, |
379 | u32 gpc, u32 tpc, u32 sm); | 379 | u32 gpc, u32 tpc, u32 sm); |
380 | void (*resume_all_sms)(struct gk20a *g); | ||
380 | } gr; | 381 | } gr; |
381 | struct { | 382 | struct { |
382 | void (*init_hw)(struct gk20a *g); | 383 | void (*init_hw)(struct gk20a *g); |