From 5e17dc9419c05188646aeaec93fa83b3f80ac60d Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Sun, 2 Jul 2017 17:04:05 -0700 Subject: gpu: nvgpu: add resume_all_sms gr ops This is required to support multiple SM and t19x sm register address changes JIRA GPUT19X-75 Change-Id: I844b5cf02a75ba397891a1100d917875e5a3e181 Signed-off-by: Seema Khowala Reviewed-on: https://git-master/r/1512217 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index aae54cc2..7dd4a9fa 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -377,6 +377,7 @@ struct gpu_ops { u32 global_esr_mask, bool check_errors); void (*resume_single_sm)(struct gk20a *g, u32 gpc, u32 tpc, u32 sm); + void (*resume_all_sms)(struct gk20a *g); } gr; struct { void (*init_hw)(struct gk20a *g); -- cgit v1.2.2