diff options
author | Philip Elcan <pelcan@nvidia.com> | 2018-10-03 14:46:57 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2019-02-05 12:04:02 -0500 |
commit | bace52ac7a5ee8683bedba23721900724e3de30a (patch) | |
tree | 1085ef171203233f4498795469f175634c4e85ea /drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |
parent | aa84e8a9867fdc72812f2609c142bdd21e5d03de (diff) |
gpu: nvgpu: make tsgid a consistent type
Different units were declaring tsgid as int or u32. This makes everyone
use u32. This change resolves MISRA 10.3 violations for implicit
assingment to different types.
JIRA NVGPU-647
Change-Id: I78660e737acb0dad76dd538e5dd37f4527cf5acd
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918469
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit f5cac144a04a3ef83762ecb2e3f405196beffd68 in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2008513
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 2dd18370..e5ccfcb4 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -3528,7 +3528,7 @@ int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, | |||
3528 | return 0; | 3528 | return 0; |
3529 | } | 3529 | } |
3530 | if (tsg && ++tsg->num_active_channels) { | 3530 | if (tsg && ++tsg->num_active_channels) { |
3531 | set_bit(f->channel[chid].tsgid, | 3531 | set_bit((int)f->channel[chid].tsgid, |
3532 | runlist->active_tsgs); | 3532 | runlist->active_tsgs); |
3533 | } | 3533 | } |
3534 | } else { | 3534 | } else { |
@@ -3537,7 +3537,7 @@ int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, | |||
3537 | return 0; | 3537 | return 0; |
3538 | } | 3538 | } |
3539 | if (tsg && --tsg->num_active_channels == 0) { | 3539 | if (tsg && --tsg->num_active_channels == 0) { |
3540 | clear_bit(f->channel[chid].tsgid, | 3540 | clear_bit((int)f->channel[chid].tsgid, |
3541 | runlist->active_tsgs); | 3541 | runlist->active_tsgs); |
3542 | } | 3542 | } |
3543 | } | 3543 | } |
@@ -3642,7 +3642,7 @@ static int __locked_fifo_reschedule_preempt_next(struct channel_gk20a *ch, | |||
3642 | int ret = 0; | 3642 | int ret = 0; |
3643 | u32 gr_eng_id = 0; | 3643 | u32 gr_eng_id = 0; |
3644 | u32 engstat = 0, ctxstat = 0, fecsstat0 = 0, fecsstat1 = 0; | 3644 | u32 engstat = 0, ctxstat = 0, fecsstat0 = 0, fecsstat1 = 0; |
3645 | s32 preempt_id = -1; | 3645 | u32 preempt_id; |
3646 | u32 preempt_type = 0; | 3646 | u32 preempt_type = 0; |
3647 | 3647 | ||
3648 | if (1 != gk20a_fifo_get_engine_ids( | 3648 | if (1 != gk20a_fifo_get_engine_ids( |