From bace52ac7a5ee8683bedba23721900724e3de30a Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Wed, 3 Oct 2018 14:46:57 -0400 Subject: gpu: nvgpu: make tsgid a consistent type Different units were declaring tsgid as int or u32. This makes everyone use u32. This change resolves MISRA 10.3 violations for implicit assingment to different types. JIRA NVGPU-647 Change-Id: I78660e737acb0dad76dd538e5dd37f4527cf5acd Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/1918469 Signed-off-by: Debarshi Dutta (cherry picked from commit f5cac144a04a3ef83762ecb2e3f405196beffd68 in dev-kernel) Reviewed-on: https://git-master.nvidia.com/r/2008513 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 2dd18370..e5ccfcb4 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -3528,7 +3528,7 @@ int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, return 0; } if (tsg && ++tsg->num_active_channels) { - set_bit(f->channel[chid].tsgid, + set_bit((int)f->channel[chid].tsgid, runlist->active_tsgs); } } else { @@ -3537,7 +3537,7 @@ int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, return 0; } if (tsg && --tsg->num_active_channels == 0) { - clear_bit(f->channel[chid].tsgid, + clear_bit((int)f->channel[chid].tsgid, runlist->active_tsgs); } } @@ -3642,7 +3642,7 @@ static int __locked_fifo_reschedule_preempt_next(struct channel_gk20a *ch, int ret = 0; u32 gr_eng_id = 0; u32 engstat = 0, ctxstat = 0, fecsstat0 = 0, fecsstat1 = 0; - s32 preempt_id = -1; + u32 preempt_id; u32 preempt_type = 0; if (1 != gk20a_fifo_get_engine_ids( -- cgit v1.2.2