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author | Deepak Nibade <dnibade@nvidia.com> | 2018-04-19 10:14:28 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-04-22 10:33:43 -0400 |
commit | ae04f394cf9a82a762a7152747a6bba5be6f5f53 (patch) | |
tree | 001f8839b8b6b7fdef1ac3c5907b84c72488ddbe /drivers/gpu/nvgpu/gk20a/bus_gk20a.c | |
parent | f85f21d1a5eeb10e764b820bba4452ee03f9c52a (diff) |
gpu: nvgpu: add HAL to set ppriv timeouts
Add new HAL gops.bus.set_ppriv_timeout_settings() to set platform specific
ppriv timeouts
Set this HAL for all supported GPUs for now
Jira NVGPUT-35
Change-Id: I88b438a7bf381d0216e0947a16cd267461d0e8d7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1699314
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/bus_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/bus_gk20a.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/bus_gk20a.c b/drivers/gpu/nvgpu/gk20a/bus_gk20a.c index 81a5facc..ab75e8d7 100644 --- a/drivers/gpu/nvgpu/gk20a/bus_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/bus_gk20a.c | |||
@@ -34,6 +34,9 @@ | |||
34 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 34 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
35 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> | 35 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> |
36 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> | 36 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> |
37 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h> | ||
38 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h> | ||
39 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h> | ||
37 | 40 | ||
38 | void gk20a_bus_init_hw(struct gk20a *g) | 41 | void gk20a_bus_init_hw(struct gk20a *g) |
39 | { | 42 | { |
@@ -172,3 +175,14 @@ int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst) | |||
172 | 175 | ||
173 | return 0; | 176 | return 0; |
174 | } | 177 | } |
178 | |||
179 | void gk20a_bus_set_ppriv_timeout_settings(struct gk20a *g) | ||
180 | { | ||
181 | /* | ||
182 | * Bug 1340570: increase the clock timeout to avoid potential | ||
183 | * operation failure at high gpcclk rate. Default values are 0x400. | ||
184 | */ | ||
185 | nvgpu_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); | ||
186 | nvgpu_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); | ||
187 | nvgpu_writel(g, pri_ringstation_fbp_master_config_r(0x8), 0x800); | ||
188 | } | ||