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-rw-r--r--nvdebug_entry.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/nvdebug_entry.c b/nvdebug_entry.c
index 0cf5344..68e4d71 100644
--- a/nvdebug_entry.c
+++ b/nvdebug_entry.c
@@ -109,6 +109,7 @@ int probe_and_cache_devices(void) {
109 g_nvdebug_state[i].chip_id = ids.chip_id; 109 g_nvdebug_state[i].chip_id = ids.chip_id;
110 g_nvdebug_state[i].pcid = NULL; 110 g_nvdebug_state[i].pcid = NULL;
111 g_nvdebug_state[i].bar3 = NULL; 111 g_nvdebug_state[i].bar3 = NULL;
112 g_nvdebug_state[i].dev = dev;
112 printk(KERN_INFO "[nvdebug] Chip ID %x (architecture %s) detected on platform bus and initialized.", 113 printk(KERN_INFO "[nvdebug] Chip ID %x (architecture %s) detected on platform bus and initialized.",
113 ids.chip_id, ARCH2NAME(ids.architecture)); 114 ids.chip_id, ARCH2NAME(ids.architecture));
114 i++; 115 i++;
@@ -131,6 +132,7 @@ int probe_and_cache_devices(void) {
131 if (!g_nvdebug_state[i].bar3) 132 if (!g_nvdebug_state[i].bar3)
132 g_nvdebug_state[i].bar3 = pci_iomap(pcid, 3, pci_resource_len(pcid, 3)/2); 133 g_nvdebug_state[i].bar3 = pci_iomap(pcid, 3, pci_resource_len(pcid, 3)/2);
133 g_nvdebug_state[i].pcid = pcid; 134 g_nvdebug_state[i].pcid = pcid;
135 g_nvdebug_state[i].dev = &pcid->dev;
134 ids.raw = nvdebug_readl(&g_nvdebug_state[i], NV_MC_BOOT_0); 136 ids.raw = nvdebug_readl(&g_nvdebug_state[i], NV_MC_BOOT_0);
135 if (ids.raw == -1) { 137 if (ids.raw == -1) {
136 pci_err(pcid, "[nvdebug] Unable to read config from Master Controller on this GPU\n"); 138 pci_err(pcid, "[nvdebug] Unable to read config from Master Controller on this GPU\n");