1 files changed, 28 insertions, 24 deletions

diff --git a/nvdebug.h b/nvdebug.h
index be718dd..39e07b4 100644
--- a/nvdebug.h
+++ b/nvdebug.h
@@ -457,7 +457,7 @@ enum ENGINE_TYPES {
         ENGINE_COPY2 = 3, // [raw/physical] COPY #2
 
         ENGINE_MSPDEC = 8, // Picture DECoder
-        ENGINE_MSPPP = 9, // [Video] Post Processing
+        ENGINE_MSPPP = 9, // [Video] Picture Post Processor
         ENGINE_MSVLD = 10, // [Video] Variable Length Decoder
         ENGINE_MSENC = 11, // [Video] ENCoding
         ENGINE_VIC = 12, // Video Image Compositor
@@ -468,10 +468,12 @@ enum ENGINE_TYPES {
 
         ENGINE_IOCTRL = 18, // I/O ConTRoLler [of NVLINK at least]
         ENGINE_LCE = 19, // Logical Copy Engine
-        ENGINE_GSP = 20, // Gpu System Processor
-        ENGINE_NVJPG = 21, // NVidia JPeG [Decoder] (Ampere+)
+        ENGINE_GSP = 20, // Gpu System Processor (Volta+)
+        ENGINE_NVJPG = 21, // NVidia JPeG [Decoder] (Turing+)
+        ENGINE_OFA = 22, // Optical Flow Accelerator (Turing+)
+        ENGINE_FLA = 23, // [NVLink] Fabric Logical Addressing [?]
 };
-#define ENGINE_TYPES_LEN 22
+#define ENGINE_TYPES_LEN 24
 static const char* const ENGINE_TYPES_NAMES[ENGINE_TYPES_LEN] = {
         "Graphics/Compute",
         "COPY0",
@@ -495,9 +497,11 @@ static const char* const ENGINE_TYPES_NAMES[ENGINE_TYPES_LEN] = {
         "LCE: Logical Copy Engine",
         "GSP: GPU System Processor",
         "NVJPG: NVIDIA JPEG Decoder",
+        "OFA: Optical Flow Accelerator",
+        "FLA: Fabric Logical Addressing",
 };
 
-/* GPU engine information and control register offsets
+/* GPU engine information and control register offsets (GPU TOPology)
   Each engine is described by one or more entries (terminated by an entry with
   the `has_next_entry` flag unset) in the fixed-size PTOP_DEVICE_INFO table. A
   typical device, such as the graphics/compute engine and any copy engines, are
@@ -559,34 +563,34 @@ static const char* const ENGINE_TYPES_NAMES[ENGINE_TYPES_LEN] = {
   See dev_top.ref.txt of NVIDIA's open-gpu-doc for more info.
 */
 
-#define NV_PTOP_DEVICE_INFO_AMPERE(i) (0x00022800+(i)*4)
-#define NV_PTOP_DEVICE_INFO_PREVIOUS(i) (0x00022700+(i)*4)
-#define NV_PTOP_DEVICE_INFO__SIZE_1_AMPERE(g) (nvdebug_readl(g, 0x0224fc) >> 20)
-#define NV_PTOP_DEVICE_INFO__SIZE_1_PREVIOUS 64
+#define NV_PTOP_DEVICE_INFO_GA100(i) (0x00022800+(i)*4)
+#define NV_PTOP_DEVICE_INFO_GK104(i) (0x00022700+(i)*4)
+#define NV_PTOP_DEVICE_INFO__SIZE_1_GA100(g) (nvdebug_readl(g, 0x0224fc) >> 20)
+#define NV_PTOP_DEVICE_INFO__SIZE_1_GK104 64
 #define NV_PTOP_DEVICE_INFO_TYPE_COUNT 3
 typedef union {
         struct {
-                uint32_t fault_id:7;
-                uint32_t padding0:9;
-                uint32_t inst_id:4;
-                uint32_t padding1:4;
-                enum ENGINE_TYPES engine_type:7;
+                uint32_t fault_id:11;
+                 uint32_t padding0:5;
+                uint32_t inst_id:8;
+                enum ENGINE_TYPES engine_type:7; // "type_enum"
                 bool has_next_entry:1;
         } __attribute__((packed));
         struct {
-                uint32_t reset_enum:5;
-                uint32_t padding2:7;
-                uint32_t pri_base:12;
-                uint32_t padding3:8;
+                uint32_t reset_enum:8; // "reset_id"
+                uint32_t pri_base:18; // "device_pri_base"
+                 uint32_t padding1:4;
+                uint32_t is_engine:1;
+                 uint32_t padding2:1;
         } __attribute__((packed));
         struct {
-                uint32_t engine_enum:2;
-                uint32_t padding4:8;
-                uint32_t runlist_enum:14;
-                uint32_t padding5:8;
+                uint32_t engine_enum:2; // "rleng_id"
+                 uint32_t padding3:8;
+                uint32_t runlist_enum:16; // "runlist_pri_base"
+                 uint32_t padding4:6;
         } __attribute__((packed));
         uint32_t raw;
-} ptop_device_info_ampere_t;
+} ptop_device_info_ga100_t;
 
 typedef union {
         // DATA type fields
@@ -625,7 +629,7 @@ typedef union {
                  uint32_t padding9:1;
         } __attribute__((packed));
         uint32_t raw;
-} ptop_device_info_previous_t;
+} ptop_device_info_gk104_t;
 
 #define NV_PTOP_SCAL_NUM_GPCS 0x00022430
 #define NV_PTOP_SCAL_NUM_TPC_PER_GPC 0x00022434