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1/*
2* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3*
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21*/
22
23#ifndef NVGPU_VOLT_DEV_H
24#define NVGPU_VOLT_DEV_H
25
26#include "boardobj/boardobj.h"
27#include "boardobj/boardobjgrp.h"
28#include "ctrl/ctrlvolt.h"
29
30#define VOLTAGE_TABLE_MAX_ENTRIES_ONE 1U
31#define VOLTAGE_TABLE_MAX_ENTRIES 256U
32
33struct voltage_device {
34 struct boardobj super;
35 u8 volt_domain;
36 u8 i2c_dev_idx;
37 u32 switch_delay_us;
38 u32 num_entries;
39 struct voltage_device_entry *pentry[VOLTAGE_TABLE_MAX_ENTRIES];
40 struct voltage_device_entry *pcurr_entry;
41 u8 rsvd_0;
42 u8 rsvd_1;
43 u8 operation_type;
44 u32 voltage_min_uv;
45 u32 voltage_max_uv;
46 u32 volt_step_uv;
47};
48
49struct voltage_device_entry {
50 u32 voltage_uv;
51};
52
53struct voltage_device_metadata {
54 struct boardobjgrp_e32 volt_devices;
55};
56
57/*!
58 * Extends VOLTAGE_DEVICE providing attributes specific to PWM controllers.
59 */
60struct voltage_device_pwm {
61 struct voltage_device super;
62 s32 voltage_base_uv;
63 s32 voltage_offset_scale_uv;
64 enum nv_pmu_pmgr_pwm_source source;
65 u32 raw_period;
66};
67
68struct voltage_device_pwm_entry {
69 struct voltage_device_entry super;
70 u32 duty_cycle;
71};
72/* PWM end */
73
74u32 volt_dev_sw_setup(struct gk20a *g);
75int volt_dev_pmu_setup(struct gk20a *g);
76
77#endif /* NVGPU_VOLT_DEV_H */