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diff --git a/include/pmu_perf/pmu_perf.h b/include/pmu_perf/pmu_perf.h
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1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#ifndef NVGPU_PERF_H
23#define NVGPU_PERF_H
24
25#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
26#include "vfe_equ.h"
27#include "vfe_var.h"
28#include "pstate/pstate.h"
29#include "volt/volt.h"
30#include "lpwr/lpwr.h"
31#include "boardobj/boardobjgrp_e255.h"
32
33#define CTRL_PERF_VFE_VAR_TYPE_INVALID 0x00
34#define CTRL_PERF_VFE_VAR_TYPE_DERIVED 0x01
35#define CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT 0x02
36#define CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM 0x03
37#define CTRL_PERF_VFE_VAR_TYPE_SINGLE 0x04
38#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY 0x05
39#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED 0x06
40#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE 0x07
41#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP 0x08
42#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE 0x09
43
44#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_NONE 0x00
45#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_VALUE 0x01
46#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_OFFSET 0x02
47#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_SCALE 0x03
48
49#define CTRL_PERF_VFE_EQU_TYPE_INVALID 0x00
50#define CTRL_PERF_VFE_EQU_TYPE_COMPARE 0x01
51#define CTRL_PERF_VFE_EQU_TYPE_MINMAX 0x02
52#define CTRL_PERF_VFE_EQU_TYPE_QUADRATIC 0x03
53
54#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UNITLESS 0x00
55#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_FREQ_MHZ 0x01
56#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_UV 0x02
57#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VF_GAIN 0x03
58#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_DELTA_UV 0x04
59
60#define CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT 0x03
61
62#define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_EQUAL 0x00
63#define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER_EQ 0x01
64#define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER 0x02
65
66struct gk20a;
67
68struct nvgpu_vfe_invalidate {
69 bool state_change;
70 struct nvgpu_cond wq;
71 struct nvgpu_thread state_task;
72};
73
74struct perf_pmupstate {
75 struct vfe_vars vfe_varobjs;
76 struct vfe_equs vfe_equobjs;
77 struct pstates pstatesobjs;
78 struct obj_volt volt;
79 struct obj_lwpr lpwr;
80 struct nvgpu_vfe_invalidate vfe_init;
81};
82
83u32 perf_pmu_vfe_load(struct gk20a *g);
84
85#endif /* NVGPU_PERF_H */