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-rw-r--r--include/os/posix/clk_arb.c198
1 files changed, 0 insertions, 198 deletions
diff --git a/include/os/posix/clk_arb.c b/include/os/posix/clk_arb.c
deleted file mode 100644
index fcba0a2..0000000
--- a/include/os/posix/clk_arb.c
+++ /dev/null
@@ -1,198 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/list.h>
24#include <nvgpu/clk_arb.h>
25
26/**
27 * Stub imlementation of the clk_arb code. Yikes. Much of this probably could be
28 * commonized if one were to think through the implementation but that is
29 * probably weeks of work at a minimum.
30 *
31 * So for POSIX it will be stubbed.
32 */
33
34int nvgpu_clk_arb_init_arbiter(struct gk20a *g)
35{
36 return -ENOSYS;
37}
38
39int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
40 u16 *min_mhz, u16 *max_mhz)
41{
42 return -ENOSYS;
43}
44
45int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
46{
47 return -ENOSYS;
48}
49
50int nvgpu_clk_arb_worker_init(struct gk20a *g)
51{
52 return -ENOSYS;
53}
54
55bool nvgpu_clk_arb_has_active_req(struct gk20a *g)
56{
57 return false;
58}
59
60int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g,
61 u32 api_domain, u16 *actual_mhz)
62{
63 return -ENOSYS;
64}
65
66int nvgpu_clk_arb_get_arbiter_effective_mhz(struct gk20a *g,
67 u32 api_domain, u16 *effective_mhz)
68{
69 return -ENOSYS;
70}
71
72int nvgpu_clk_arb_get_arbiter_clk_f_points(struct gk20a *g,
73 u32 api_domain,
74 u32 *max_points, u16 *fpoints)
75{
76 return -ENOSYS;
77}
78
79u32 nvgpu_clk_arb_get_arbiter_clk_domains(struct gk20a *g)
80{
81 return 0;
82}
83
84bool nvgpu_clk_arb_is_valid_domain(struct gk20a *g, u32 api_domain)
85{
86 return false;
87}
88
89void nvgpu_clk_arb_cleanup_arbiter(struct gk20a *g)
90{
91}
92
93int nvgpu_clk_arb_install_session_fd(struct gk20a *g,
94 struct nvgpu_clk_session *session)
95{
96 return -ENOSYS;
97}
98
99
100int nvgpu_clk_arb_init_session(struct gk20a *g,
101 struct nvgpu_clk_session **_session)
102{
103 return -ENOSYS;
104}
105
106void nvgpu_clk_arb_release_session(struct gk20a *g,
107 struct nvgpu_clk_session *session)
108{
109}
110
111int nvgpu_clk_arb_commit_request_fd(struct gk20a *g,
112 struct nvgpu_clk_session *session,
113 int request_fd)
114{
115 return -ENOSYS;
116}
117
118int nvgpu_clk_arb_set_session_target_mhz(struct nvgpu_clk_session *session,
119 int fd, u32 api_domain, u16 target_mhz)
120{
121 return -ENOSYS;
122}
123
124int nvgpu_clk_arb_get_session_target_mhz(struct nvgpu_clk_session *session,
125 u32 api_domain, u16 *target_mhz)
126{
127 return -ENOSYS;
128}
129
130int nvgpu_clk_arb_install_event_fd(struct gk20a *g,
131 struct nvgpu_clk_session *session,
132 int *event_fd, u32 alarm_mask)
133{
134 return -ENOSYS;
135}
136
137int nvgpu_clk_arb_install_request_fd(struct gk20a *g,
138 struct nvgpu_clk_session *session,
139 int *event_fd)
140{
141 return -ENOSYS;
142}
143
144u32 nvgpu_clk_arb_notify(struct nvgpu_clk_dev *dev,
145 struct nvgpu_clk_arb_target *target,
146 u32 alarm)
147{
148 return 0;
149}
150
151void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount)
152{
153}
154
155void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g)
156{
157}
158
159int nvgpu_clk_arb_get_current_pstate(struct gk20a *g)
160{
161 return -ENOSYS;
162}
163
164void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock)
165{
166}
167
168void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g)
169{
170}
171
172void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm)
173{
174}
175
176void nvgpu_clk_arb_set_global_alarm(struct gk20a *g, u32 alarm)
177{
178}
179
180void nvgpu_clk_arb_clear_global_alarm(struct gk20a *g, u32 alarm)
181{
182}
183
184void nvgpu_clk_arb_event_post_event(struct nvgpu_clk_dev *dev)
185{
186}
187
188void nvgpu_clk_arb_worker_enqueue(struct gk20a *g,
189 struct nvgpu_clk_arb_work_item *work_item)
190{
191}
192
193int nvgpu_clk_notification_queue_alloc(struct gk20a *g,
194 struct nvgpu_clk_notification_queue *queue,
195 size_t events_number)
196{
197 return -ENOSYS;
198}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-30 10:24:37 -0400