aboutsummaryrefslogtreecommitdiffstats
path: root/include/os/linux/vgpu/fecs_trace_vgpu.c
diff options
context:
space:
mode:
Diffstat (limited to 'include/os/linux/vgpu/fecs_trace_vgpu.c')
-rw-r--r--include/os/linux/vgpu/fecs_trace_vgpu.c225
1 files changed, 0 insertions, 225 deletions
diff --git a/include/os/linux/vgpu/fecs_trace_vgpu.c b/include/os/linux/vgpu/fecs_trace_vgpu.c
deleted file mode 100644
index 02a381e..0000000
--- a/include/os/linux/vgpu/fecs_trace_vgpu.c
+++ /dev/null
@@ -1,225 +0,0 @@
1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <uapi/linux/nvgpu.h>
18
19#include <nvgpu/kmem.h>
20#include <nvgpu/bug.h>
21#include <nvgpu/enabled.h>
22#include <nvgpu/ctxsw_trace.h>
23#include <nvgpu/vgpu/vgpu_ivm.h>
24#include <nvgpu/vgpu/tegra_vgpu.h>
25#include <nvgpu/vgpu/vgpu.h>
26#include <nvgpu/gk20a.h>
27
28#include "os/linux/os_linux.h"
29#include "gk20a/fecs_trace_gk20a.h"
30#include "vgpu/fecs_trace_vgpu.h"
31
32struct vgpu_fecs_trace {
33 struct tegra_hv_ivm_cookie *cookie;
34 struct nvgpu_ctxsw_ring_header *header;
35 struct nvgpu_gpu_ctxsw_trace_entry *entries;
36 int num_entries;
37 bool enabled;
38 void *buf;
39};
40
41int vgpu_fecs_trace_init(struct gk20a *g)
42{
43 struct device *dev = dev_from_gk20a(g);
44 struct device_node *np = dev->of_node;
45 struct of_phandle_args args;
46 struct vgpu_fecs_trace *vcst;
47 u32 mempool;
48 int err;
49
50 nvgpu_log_fn(g, " ");
51
52 vcst = nvgpu_kzalloc(g, sizeof(*vcst));
53 if (!vcst)
54 return -ENOMEM;
55
56 err = of_parse_phandle_with_fixed_args(np,
57 "mempool-fecs-trace", 1, 0, &args);
58 if (err) {
59 nvgpu_info(g, "does not support fecs trace");
60 goto fail;
61 }
62 __nvgpu_set_enabled(g, NVGPU_SUPPORT_FECS_CTXSW_TRACE, true);
63
64 mempool = args.args[0];
65 vcst->cookie = vgpu_ivm_mempool_reserve(mempool);
66 if (IS_ERR(vcst->cookie)) {
67 nvgpu_info(g,
68 "mempool %u reserve failed", mempool);
69 vcst->cookie = NULL;
70 err = -EINVAL;
71 goto fail;
72 }
73
74 vcst->buf = ioremap_cache(vgpu_ivm_get_ipa(vcst->cookie),
75 vgpu_ivm_get_size(vcst->cookie));
76 if (!vcst->buf) {
77 nvgpu_info(g, "ioremap_cache failed");
78 err = -EINVAL;
79 goto fail;
80 }
81 vcst->header = vcst->buf;
82 vcst->num_entries = vcst->header->num_ents;
83 if (unlikely(vcst->header->ent_size != sizeof(*vcst->entries))) {
84 nvgpu_err(g, "entry size mismatch");
85 goto fail;
86 }
87 vcst->entries = vcst->buf + sizeof(*vcst->header);
88 g->fecs_trace = (struct gk20a_fecs_trace *)vcst;
89
90 return 0;
91fail:
92 iounmap(vcst->buf);
93 if (vcst->cookie)
94 vgpu_ivm_mempool_unreserve(vcst->cookie);
95 nvgpu_kfree(g, vcst);
96 return err;
97}
98
99int vgpu_fecs_trace_deinit(struct gk20a *g)
100{
101 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
102
103 iounmap(vcst->buf);
104 vgpu_ivm_mempool_unreserve(vcst->cookie);
105 nvgpu_kfree(g, vcst);
106 return 0;
107}
108
109int vgpu_fecs_trace_enable(struct gk20a *g)
110{
111 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
112 struct tegra_vgpu_cmd_msg msg = {
113 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_ENABLE,
114 .handle = vgpu_get_handle(g),
115 };
116 int err;
117
118 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
119 err = err ? err : msg.ret;
120 WARN_ON(err);
121 vcst->enabled = !err;
122 return err;
123}
124
125int vgpu_fecs_trace_disable(struct gk20a *g)
126{
127 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
128 struct tegra_vgpu_cmd_msg msg = {
129 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_DISABLE,
130 .handle = vgpu_get_handle(g),
131 };
132 int err;
133
134 vcst->enabled = false;
135 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
136 err = err ? err : msg.ret;
137 WARN_ON(err);
138 return err;
139}
140
141bool vgpu_fecs_trace_is_enabled(struct gk20a *g)
142{
143 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
144
145 return (vcst && vcst->enabled);
146}
147
148int vgpu_fecs_trace_poll(struct gk20a *g)
149{
150 struct tegra_vgpu_cmd_msg msg = {
151 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_POLL,
152 .handle = vgpu_get_handle(g),
153 };
154 int err;
155
156 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
157 err = err ? err : msg.ret;
158 WARN_ON(err);
159 return err;
160}
161
162int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size)
163{
164 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
165
166 *buf = vcst->buf;
167 *size = vgpu_ivm_get_size(vcst->cookie);
168 return 0;
169}
170
171int vgpu_free_user_buffer(struct gk20a *g)
172{
173 return 0;
174}
175
176int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma)
177{
178 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
179 unsigned long size = vgpu_ivm_get_size(vcst->cookie);
180 unsigned long vsize = vma->vm_end - vma->vm_start;
181
182 size = min(size, vsize);
183 size = round_up(size, PAGE_SIZE);
184
185 return remap_pfn_range(vma, vma->vm_start,
186 vgpu_ivm_get_ipa(vcst->cookie) >> PAGE_SHIFT,
187 size,
188 vma->vm_page_prot);
189}
190
191#ifdef CONFIG_GK20A_CTXSW_TRACE
192int vgpu_fecs_trace_max_entries(struct gk20a *g,
193 struct nvgpu_gpu_ctxsw_trace_filter *filter)
194{
195 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
196
197 return vcst->header->num_ents;
198}
199
200#if NVGPU_CTXSW_FILTER_SIZE != TEGRA_VGPU_FECS_TRACE_FILTER_SIZE
201#error "FECS trace filter size mismatch!"
202#endif
203
204int vgpu_fecs_trace_set_filter(struct gk20a *g,
205 struct nvgpu_gpu_ctxsw_trace_filter *filter)
206{
207 struct tegra_vgpu_cmd_msg msg = {
208 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_SET_FILTER,
209 .handle = vgpu_get_handle(g),
210 };
211 struct tegra_vgpu_fecs_trace_filter *p = &msg.params.fecs_trace_filter;
212 int err;
213
214 memcpy(&p->tag_bits, &filter->tag_bits, sizeof(p->tag_bits));
215 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
216 err = err ? err : msg.ret;
217 WARN_ON(err);
218 return err;
219}
220
221void vgpu_fecs_trace_data_update(struct gk20a *g)
222{
223 gk20a_ctxsw_trace_wake_up(g, 0);
224}
225#endif /* CONFIG_GK20A_CTXSW_TRACE */