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-rw-r--r--include/os/linux/os_fence_android_syncpt.c121
1 files changed, 0 insertions, 121 deletions
diff --git a/include/os/linux/os_fence_android_syncpt.c b/include/os/linux/os_fence_android_syncpt.c
deleted file mode 100644
index 368a03c..0000000
--- a/include/os/linux/os_fence_android_syncpt.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/err.h>
18#include <nvgpu/errno.h>
19
20#include <nvgpu/types.h>
21#include <nvgpu/os_fence.h>
22#include <nvgpu/linux/os_fence_android.h>
23#include <nvgpu/nvhost.h>
24#include <nvgpu/atomic.h>
25#include <nvgpu/gk20a.h>
26#include <nvgpu/channel.h>
27#include <nvgpu/channel_sync.h>
28
29#include "gk20a/mm_gk20a.h"
30
31#include "../drivers/staging/android/sync.h"
32
33int nvgpu_os_fence_syncpt_wait_gen_cmd(struct nvgpu_os_fence *s,
34 struct priv_cmd_entry *wait_cmd,
35 struct channel_gk20a *c,
36 int max_wait_cmds)
37{
38 int err;
39 int wait_cmd_size;
40 int num_wait_cmds;
41 int i;
42 u32 wait_id;
43 struct sync_pt *pt;
44
45 struct sync_fence *sync_fence = (struct sync_fence *)s->priv;
46
47 if (max_wait_cmds && sync_fence->num_fences > max_wait_cmds)
48 return -EINVAL;
49
50 /* validate syncpt ids */
51 for (i = 0; i < sync_fence->num_fences; i++) {
52 pt = sync_pt_from_fence(sync_fence->cbs[i].sync_pt);
53 wait_id = nvgpu_nvhost_sync_pt_id(pt);
54 if (!wait_id || !nvgpu_nvhost_syncpt_is_valid_pt_ext(
55 c->g->nvhost_dev, wait_id)) {
56 return -EINVAL;
57 }
58 }
59
60 num_wait_cmds = nvgpu_nvhost_sync_num_pts(sync_fence);
61 if (num_wait_cmds == 0)
62 return 0;
63
64 wait_cmd_size = c->g->ops.fifo.get_syncpt_wait_cmd_size();
65 err = gk20a_channel_alloc_priv_cmdbuf(c,
66 wait_cmd_size * num_wait_cmds, wait_cmd);
67 if (err) {
68 return err;
69 }
70
71 for (i = 0; i < sync_fence->num_fences; i++) {
72 struct sync_pt *pt = sync_pt_from_fence(
73 sync_fence->cbs[i].sync_pt);
74 u32 wait_id = nvgpu_nvhost_sync_pt_id(pt);
75 u32 wait_value = nvgpu_nvhost_sync_pt_thresh(pt);
76
77 err = channel_sync_syncpt_gen_wait_cmd(c, wait_id, wait_value,
78 wait_cmd, wait_cmd_size, i, true);
79 }
80
81 WARN_ON(i != num_wait_cmds);
82
83 return 0;
84}
85
86static const struct nvgpu_os_fence_ops syncpt_ops = {
87 .program_waits = nvgpu_os_fence_syncpt_wait_gen_cmd,
88 .drop_ref = nvgpu_os_fence_android_drop_ref,
89 .install_fence = nvgpu_os_fence_android_install_fd,
90};
91
92int nvgpu_os_fence_syncpt_create(
93 struct nvgpu_os_fence *fence_out, struct channel_gk20a *c,
94 struct nvgpu_nvhost_dev *nvhost_dev, u32 id, u32 thresh)
95{
96 struct sync_fence *fence = nvgpu_nvhost_sync_create_fence(
97 nvhost_dev, id, thresh, "fence");
98
99 if (IS_ERR(fence)) {
100 nvgpu_err(c->g, "error %d during construction of fence.", (int)PTR_ERR(fence));
101 return PTR_ERR(fence);
102 }
103
104 nvgpu_os_fence_init(fence_out, c->g, &syncpt_ops, fence);
105
106 return 0;
107}
108
109int nvgpu_os_fence_syncpt_fdget(struct nvgpu_os_fence *fence_out,
110 struct channel_gk20a *c, int fd)
111{
112 struct sync_fence *fence = nvgpu_nvhost_sync_fdget(fd);
113
114 if (fence == NULL) {
115 return -ENOMEM;
116 }
117
118 nvgpu_os_fence_init(fence_out, c->g, &syncpt_ops, fence);
119
120 return 0;
121}