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Diffstat (limited to 'include/os/linux/os_fence_android_sema.c')
-rw-r--r--include/os/linux/os_fence_android_sema.c112
1 files changed, 0 insertions, 112 deletions
diff --git a/include/os/linux/os_fence_android_sema.c b/include/os/linux/os_fence_android_sema.c
deleted file mode 100644
index eb60600..0000000
--- a/include/os/linux/os_fence_android_sema.c
+++ /dev/null
@@ -1,112 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <nvgpu/errno.h>
18
19#include <nvgpu/types.h>
20#include <nvgpu/os_fence.h>
21#include <nvgpu/linux/os_fence_android.h>
22#include <nvgpu/semaphore.h>
23#include <nvgpu/gk20a.h>
24#include <nvgpu/channel.h>
25#include <nvgpu/channel_sync.h>
26
27#include "gk20a/mm_gk20a.h"
28
29#include "sync_sema_android.h"
30
31#include "../drivers/staging/android/sync.h"
32
33int nvgpu_os_fence_sema_wait_gen_cmd(struct nvgpu_os_fence *s,
34 struct priv_cmd_entry *wait_cmd,
35 struct channel_gk20a *c,
36 int max_wait_cmds)
37{
38 int err;
39 int wait_cmd_size;
40 int num_wait_cmds;
41 int i;
42 struct nvgpu_semaphore *sema;
43 struct sync_fence *sync_fence = nvgpu_get_sync_fence(s);
44
45 wait_cmd_size = c->g->ops.fifo.get_sema_wait_cmd_size();
46
47 num_wait_cmds = sync_fence->num_fences;
48 if (num_wait_cmds == 0)
49 return 0;
50
51 if (max_wait_cmds && num_wait_cmds > max_wait_cmds)
52 return -EINVAL;
53
54 err = gk20a_channel_alloc_priv_cmdbuf(c,
55 wait_cmd_size * num_wait_cmds,
56 wait_cmd);
57 if (err) {
58 return err;
59 }
60
61 for (i = 0; i < num_wait_cmds; i++) {
62 struct sync_pt *pt = sync_pt_from_fence(
63 sync_fence->cbs[i].sync_pt);
64
65 sema = gk20a_sync_pt_sema(pt);
66 channel_sync_semaphore_gen_wait_cmd(c, sema, wait_cmd,
67 wait_cmd_size, i);
68 }
69
70 return 0;
71}
72
73static const struct nvgpu_os_fence_ops sema_ops = {
74 .program_waits = nvgpu_os_fence_sema_wait_gen_cmd,
75 .drop_ref = nvgpu_os_fence_android_drop_ref,
76 .install_fence = nvgpu_os_fence_android_install_fd,
77};
78
79int nvgpu_os_fence_sema_create(
80 struct nvgpu_os_fence *fence_out,
81 struct channel_gk20a *c,
82 struct nvgpu_semaphore *sema)
83{
84 struct sync_fence *fence;
85
86 fence = gk20a_sync_fence_create(c, sema, "f-gk20a-0x%04x",
87 nvgpu_semaphore_gpu_ro_va(sema));
88
89 if (!fence) {
90 nvgpu_err(c->g, "error constructing new fence: f-gk20a-0x%04x",
91 (u32)nvgpu_semaphore_gpu_ro_va(sema));
92
93 return -ENOMEM;
94 }
95
96 nvgpu_os_fence_init(fence_out, c->g, &sema_ops, fence);
97
98 return 0;
99}
100
101int nvgpu_os_fence_sema_fdget(struct nvgpu_os_fence *fence_out,
102 struct channel_gk20a *c, int fd)
103{
104 struct sync_fence *fence = gk20a_sync_fence_fdget(fd);
105
106 if (!fence)
107 return -EINVAL;
108
109 nvgpu_os_fence_init(fence_out, c->g, &sema_ops, fence);
110
111 return 0;
112}