1 files changed, 58 insertions, 0 deletions

diff --git a/include/nvgpu/utils.h b/include/nvgpu/utils.h
new file mode 100644
index 0000000..6184608
--- /dev/null
+++ b/include/nvgpu/utils.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef NVGPU_UTILS_H
+#define NVGPU_UTILS_H
+
+#include <nvgpu/types.h>
+
+static inline u32 u64_hi32(u64 n)
+{
+        return (u32)((n >> 32) & ~(u32)0);
+}
+
+static inline u32 u64_lo32(u64 n)
+{
+        return (u32)(n & ~(u32)0);
+}
+
+static inline u64 hi32_lo32_to_u64(u32 hi, u32 lo)
+{
+        return  (((u64)hi) << 32) | (u64)lo;
+}
+
+static inline u32 set_field(u32 val, u32 mask, u32 field)
+{
+        return ((val & ~mask) | field);
+}
+
+static inline u32 get_field(u32 reg, u32 mask)
+{
+        return (reg & mask);
+}
+
+/*
+ * MISRA Rule 11.6 compliant IP address generator.
+ */
+#define _NVGPU_GET_IP_          ({ __label__ __here; __here: &&__here; })
+
+#endif /* NVGPU_UTILS_H */